兰州交通大学毕业设计（外文翻译）
expandable named SFR's, variable window with expandable compound types and user configurable IDLOC memory dump.
6. Diagnostic Messaging
Proteus is equipped with comprehensive diagnostic or trace messaging. This allows you to specify which components or processor peripherals they are of interest at any given time and receive detailed textual reporting of all activity and system interaction. This is invaluable as a debugging aid, allowing you to locate and fix problems in both software and hardware much faster than you could when working on a physical prototype.
Diagnostic Setup and Simulation Advisor showing trace messages from the Alphanumeric LCD Display model.
7. Peripheral Model Libraries
In addition to the microprocessor models for each supported family, and literally thousands of 'standard' models for passives, TTL/CMOS, memories, etc. Proteus VSM is equipped with a comprehensive library of embedded peripheral models, from alphanumeric and graphical LCD displays, through DC, BLCD and servo motors to ethernet controller chips. A summary listing of the peripheral models included with Proteus can be found here.
8. Why Choose Proteus VSM?
When choosing the right software solution it is often easy to lose sight of which products offer what functionality, particularly when several software companies offer packages which at first glance may look identical. Proteus VSM was the first microcontroller co-simulation package and offers more models with greater detail at the best price. To help clarify this, and to avoid confusion over product offerings, we have compiled some functional comparisons below. The core of any embedded system design is the microcontroller and the completeness of the model as well as it's accuracy are therefore of primary importance. You should always ensure that simulation models for microcontrollers not only support a peripheral that you want to use but support the mode in which you want to use the peripheral and to a satisfactory level of detail. We have found that some microcontroller models are in fact little more than instruction set simulators (which is light years away from the level of detail in Proteus VSM
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兰州交通大学毕业设计（外文翻译）
microcontroller models) The following chart details model particulars - please note that not all peripherals exist on all devices.
It's not a great deal of use to have a functionally perfect microcontroller model of a variant that you don't want to use and have no model at all for a device you do want to use. The following chart details the model families available. Note that you should always check that variants you want to use are actually modelled - Proteus VSM offers well over 150 microcontroller variants across our range and we are continually responding to customer demand to implement additional variants.
In embedded systems design it's vital that you have simulation models for the peripherals that you are likely to use. Aside from the standard collection of TTL/CMOS libraries, opamps, diodes, transistors, etc. the following chart lists some common embedded peripherals and their support within various packages. Being engineers ourselves we are always conscious that being able to simulate a schematic design is only part of the process. The real value and timesaving potential of co-simulation software lies in it's ability to help you find and fix bugs in both your software and hardware design. The comparison chart below covers some of the common debugging facilities you will find in various packages.
9. Proteus VSM for 8051
Proteus VSM for 8051 contains everything you need to develop, test and virtually prototype your embedded system designs based around the popular 8051 series of microcontrollers. The unique nature of schematic based microcontroller simulation with Proteus facilitates rapid, flexible and parallel development of both the system hardware and the system firmware. This design synergy allows engineers to evolve their projects more quickly, empowering them with the flexibility to make hardware or firmware changes at will and reducing the time to market. Proteus VSM is discussed in more detail here.
10. Proteus VSM USB Simulation
Proteus VSM USB simulation represents the worlds first (and only) schematic based USB Simulation engine. You can now design your own USB peripheral device entirely in Proteus (using one of the supported microcontrollers) and then test both the firmware and the hardware by simulating the circuit. Communication is modelled down to Windows driver
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兰州交通大学毕业设计（外文翻译）
level, with all requests to and replies from the simulated USB device displayed in the USB Transaction Analyser. Proteus VSM is discussed in more detail here.
10.1 Overview
The main aim of the Proteus VSM USB Simulation is to allow complete simulation of those microcontrollers having an on-board USB peripheral. Since the vast majority of such devices have a USB device peripheral as opposed to a USB host controller peripheral Proteus VSM is currently limited to simulation of USB devices (devices that attach to the USB socket on the computer), and specifically to simulation of the following USB Device classes.
Support for additional classes (and indeed additional microcontroller variants) is on-going and, depending on demand, implementation of USB host simulation support may also be considered.
10.2 How it Works
The schematic in Proteus represents the peripheral device (e.g. a USB memory stick or a USB mouse). A special schematic part called the USB connector is wired to the USB enabled microcontroller and clicking on this schematic part during simulation is equivalent to plugging in the device to a USB slot on your PC. The microcontroller executes the firmware through the schematic and USB communication will take place with the PC operating system in the same way as plugging in a physical equivalent device to a spare USB socket on the computer. The USB Transaction Analyser can be used to decode and display all URB transactions and register access operations during simulation and the full range of Proteus VSM debugging techniques are also available. This means that you can design, debug and test your USB peripheral entirely within the Proteus software environment before you construct a physical prototype.
10.3 What You Need
A licence for a microcontroller family with supported USB variants. This includes our schematic capture engine and enables USB simulation on the variants which include on-board USB peripherals.
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兰州交通大学毕业设计（外文翻译）
A licence for the USB Transaction Analyser. This enables you to monitor and analyse USB traffic and register access operations during simulation.
Analysis capabilities can be upgraded to include Graph Based Simulation via the Advanced Simulation Options module.
Proteus VSM PIC18F4550 model simulating Microchip Technologies Mass Storage firmware to present a file stored in the simulated MMC model to Windows via USB.
10.4 Running a USB Simulation
In practise, running a USB simulation differs little from any other VSM simulation. The typical procedure is outlined below.
Apply the COF/HEX file to the program property of the microcontroller schematic part in ISIS.
Run the simulation via the PLAY button at the bottom of the ISIS application.
Click on the USB Connector schematic part to connect the USB device - this is equivalent to plugging in the physical equivalent device to your PC.
Use the USB Transaction Analyser to monitor and verify USB traffic as your simulation progresses.
Debug and test your firmware and circuit as per any normal Proteus VSM simulation - bearing in mind that the USB Protocol has a 30 second timout limitation (your simulation needs to respond to requests within 30 seconds).
Stop the simulation via the STOP button at the bottom of the ISIS application. Modify firmware or 'hardware' as required and re-run the simulation to test.
When complete use the netlist command to transfer to ARES and commence PCB Layout.
10.5 USB Transaction Analyser
The Proteus USB Analyser is a seperately licenced product that displays all requests and replies to and from the simulated USB device. This provides an invaluable aid both to understanding the USB protocol and in verification of firmware implementation. The main Analyser window consists of two parts: the Requests List and the Requests Description as shown below.
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兰州交通大学毕业设计（外文翻译）
10.6 The USB Analyser in Proteus
The Requests list on the left hand pane of the Analyser displays all requests in tree format. There are three levels of requests; IRP requests (IOCTL, MJ_PNP), Transaction requests (IN, OUT, SETUP) and register operations associated with a given transaction. The request description forms the right hand side of the Analyser and provides detailed tabular information on the currently selected item in the Requests List. Given that the Requests list is granular to three levels it follows that comprehensive information can be retrieved at either the IRP Level, the transaction level or the register level. The small toolbar at the top of the Analyser provides options to start logging, stop logging and also to clear the log. This is particularly useful where you are interested in communications after the setup phase or in response to activity from the host controller.
11. Supported Third Party Compilers
All Proteus VSM processor models are able to run binary files (i.e. Intel or Motorola Hex files) produced by any assembler or compiler. However, the debugging facilities available are very limited since the processor model has no way to correlate the machine code it is executing with your original source program.
Fortunately, most compilers also produce symbolic debug data files that contain extra information to be used by debuggers and other tools. The Proteus VSM processor models are able to load the debug data files produced by selected third party compilers enabling them to provide full high-level language debugging facilities including the ability to display and step through the original source code as well as display the contents of program variables as the code executes.
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