b STOP LTORG SRC
DCD 0,0,0,0,0,0,0,0 exit: B exit END
实验3
main: START
mov r0,#0x3000 mov r1,#0x10000001 mov r2,#100 LOOP
str r1,[r0],#4 add r1,r1,#1 subs r2,r2,#1 bne LOOP
mov r0,#0x3000 mov r2,#100 mov r9,#0
mov r8,#0 LOOP1
ldr r1,[r0],#4 adds r8,r1,r8 adc r9,r9,#0 subs r2,r2,#1 bne LOOP1 STOP
b STOP
END
实验4
START
mov r8,#20 mov r9,#0 sub r0,r8,#1 LOOP
mov r1,r9
umull r8,r9,r0,r8 mla r9,r1,r0,r9 subs r0,r0,#1
bne LOOP END
实验5
START
ldr r2,=0x12345678 CODE16
ldr r2,=0x87654321 END