基于FPGA的数字滤波器设计
院 系：信息科学与工程学院 专 业 班：通信工程1102班 姓 名：李羚 学 号：20111181082 指导教师：周忠强 王军舰
2015年5月
基于FPGA的FIR数字滤波器设计
摘 要
随着公元的第二十一个世纪的到来，今天我们进入了一个科技日新月异的时代。在现代电子数字系统中，滤波器都以一个不可缺少的身份出现。其中，FIR数字滤波器又以其良好的线性特性被广泛和有针对性的大量使用。众所周知，灵活性和实时性是工程实践中对数字信号处理的基本要求。在以往使用的各种滤波器技术中，不难发现有许许多多的问题。但是，随着现代计算机技术在滤波问题上的飞跃，派生出一个全新的分支——数字滤波器。利用可编程逻辑器件和EDA技术，使用FPGA来实现FIR滤波器，可以同时兼顾实时性和灵活性。基于FPGA的FIR数字滤波器的研究势在必行。
本论文讨论基于FPGA的FIR数字滤波器设计，针对该毕业设计要做的基本工作有如下几点：
（一）掌握有限冲击响应FIR（Finite Impulse Response， FIR）的基本结构，研究现有的实现方法。对各种方案和步骤进行比较和论证分析，然后针对目前FIR数字滤波器需要的特点，速度快和硬件规模小，作为指导思想进行设计计算。
（二）基于硬件FPGA的特点，利用Matlab软件以及窗函数法设计滤波器。对整个FPGA元件，计划采用模块化、层次化设计思想，从而对各个部分功能进行更为详细的理解和分工设计。最终FIR数字滤波器的设计语言选择VHDL硬件编程语言。
（三）设计中的软件仿真使用Altera公司的综合性PLD开发软件Quartus II，并且利用Matlab工具进行对比仿真，在仿真的过程中，对比证明，本论文设计的滤波器的技术指标已经全部达标。
关键词：数字滤波器 Matlab 可编程逻辑元件 模块化算法
基于FPGA的FIR数字滤波器设计
Based On FPGA Design Of FIR Digital Filters
Major：Electronic And Information Engineering Department
（ Information Engineering）
Student: YangChengjie Supervisor:FengLiu
Abstract
As we have entered the twenty first century， our technology is changing continuously with the times. In the modern electronic digital systems， filters are indispensable. Among them， the FIR digital filters are widely used with the excellent linear characteristic. As is well-known to us all， flexibility and real-time quality are the basic requirements in digital signal processing of engineering practice. Since we have used a variety of filter technology in the past， it is not difficult for us to find many problems in it. Moreover， with the development of modern computer technology in filter， a new branch - digital filter has derived. We make use of the programmable logic devices and EDA technology， together with the FPGA to design the FIR filter， which is real-time and flexible. In a nutshell， it is imperative to do the research in the FIR digital filters based on the technology of FPGA. This thesis is focused on the design of the FIR digital filters based on the technology of FPGA. Several points are worth mentioning here:
(1)To understand and master the basic structure of the limited shock Response FIR (Finite Impulse Response， FIR)， research existing realization method，to use various solutions to compare and analyze the steps and demonstrations; then， to do the self design and correction concerning the characteristics of the present FIR digital filters， that is， fast in speed and small scale in hardware.
(2) To design FIR filter based on the characteristics of FPGA hardware. In the design process， ready to use of Matlab software and window function method design filter. As far as the whole FPGA components are concerned， we plan to carry on the modularized and hierarchic design， in order to have a more detailed understanding of the function of each
II
基于FPGA的FIR数字滤波器设计
part and make a division of design. Eventually， FIR digital filters will adopt the VHDL hardware programming language.
(3) To adopt the comprehensive PLD development software Quartus II of the Altera company in the design of the software simulation. And we will use of the Matlab tools for the simulation 。In the simulation process， contrast our filter technology index whether you have all the standards， and filtering whether the result is ideal.
Keywords: digital filter，
Matlab，programmable logic devices，
III
Modular Algorithm
基于FPGA的FIR数字滤波器设计
目 录
1绪 论 .................................................................. 1
1.1本课题研究意义 ................................................... 1 1.2国内外研究现状分析 ............................................... 1 1.3研究思路 ......................................................... 1 1.4相关概念说明 ..................................................... 1 2 FIR数字滤波器的设计方法 ............................................... 4
2.1理论部分 ......................................................... 4
2.1.1引言 ........................................................ 4 2.1.2 FIR数字滤波器的基础 ........................................ 4 2.1.3数字滤波器的设计原理 ........................................ 6 2.1.4 FIR数字滤波器的理论计算方式与参数转换思想: ................. 7 2.1.5 Matlab直接FDAtool设计方式解析 ............................ 13 2.1.6 FDAtool设计模板及设计结果图 ............................... 16 2.2程序分析部分 .................................................... 16
2.2.1 FPGA 可编程逻辑元件介绍 .................................. 17 2.2.2 QuartusⅡ及Verilog HDL介绍 ............................... 18 2.2.3实际滤波器程序设计（11阶FIR数字滤波器） .................. 19 2.2.4.VerilogHDL的实现 .......................................... 20
3 滤波器仿真滤波 ....................................................... 28
3.1设置混合信号 .................................................... 28 3.2设置仿真参数 .................................................... 31 3.3 仿真总结 ........................................................ 33 4 总结与展望 ........................................................... 34
4.1 设计成果总结 .................................................... 34 4.2 设计心得 ........................................................ 34 参考文献 ............................................................... 35 致谢 ................................................................... 36
IV