ICS84025中文资料(9)

2021-04-05 07:01

元器件交易网

PRELIMINARY

IntegratedCircuit

Systems, Inc.

The following component footprints are used in this layoutexample:

All the resistors and capacitors are size 0603.

CRYSTAL-TO-LVCMOS / LVTTL

FREQUENCY SYNTHESIZER WITH FANOUT BUFFER

The differential 50 output traces should have thesame length.

Avoid sharp angles on the clock trace. Sharp angleturns cause the characteristic impedance to change onthe transmission lines.

Keep the clock traces on the same layer. Whenever pos-sible, avoid placing vias on the clock traces. Placementof vias on the traces can affect the trace characteristicimpedance and hence degrade signal integrity. To prevent cross talk, avoid routing other signal traces inparallel with the clock traces. If running parallel traces isunavoidable, allow a separation of at least three tracewidths between the differential clock trace and the othersignal trace.

Make sure no other signal traces are routed between theclock trace pair.

The matching termination resistors should be located asclose to the receiver input pins as possible.

ICS84025

POWER AND GROUNDING

Place the decoupling capacitors as close as possible to the powerpins. If space allows, placement of the decoupling capacitor onthe component side is preferred. This can reduce unwanted in-ductance between the decoupling capacitor and the power pincaused by the via.

Maximize the power and ground pad sizes and number of viascapacitors. This can reduce the inductance between the powerand ground planes and the component power and ground pins.The RC filter consisting of R7, C11, and C16 should be placedas close to the VDDA pin as possible.

CLOCK TRACES AND TERMINATION

Poor signal integrity can degrade the system performance orcause system failure. In synchronous high-speed digital systems,the clock signal is less tolerant to poor signal integrity than othersignals. Any ringing on the rising or falling edge or excessive ringback can cause system failure. The shape of the trace and theCRYSTAL

The crystal X1 should be located as close as possible to the pins21 (XTAL1) and 20 (XTAL2). The trace length between the X184025EM

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9

REV. A APRIL 16, 2003


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