#include \ //#include \ #include \
#define EPWM1_TIMER_TBPRD 3750 #define EPWM2_TIMER_TBPRD 3750
void InitEPwm1Example(void); void InitEPwm2Example(void);
interrupt void epwm1_timer_isr(void); interrupt void epwm2_timer_isr(void);
extern Uint32 k=0; extern Uint32
TonC[400]={1875,1851,1828,1804,1781,1757,1734,1710,1687,1664,1640,1617, 1594,1571,1548,1525,1502,1479,1457,1434,1411,1389,1367,1345,1323,1301, 1279,1258,1236,1215,1194,1173,1152,1132,1111,1091,1071,1051,1032,1012, 993,974,956,937,919,901,883,865,848,831,814,798,782,766,750,734,719,704, 690,675,661,648,634,621,609,596,584,572,561,549,538,528,518,508,498,489, 480,472,464,456,448,441,435,428,422,416,411,406,402,397,393,390,387,384, 382,380,378,377,376,375,375,375,376,377,378,380,382,384,387,390,393,397, 402,406,411,416,422,428,435,441,448,456,464,472,480,489,498,508,518,528, 538,549,561,572,584,596,609,621,634,648,661,675,690,704,719,734,750,766, 782,798,814,831,848,865,883,901,919,937,956,974,993,1012,1032,1051,1071, 1091,1111,1132,1152,1173,1194,1215,1236,1258,1279,1301,1323,1345,1367, 1389,1411,1434,1457,1479,1502,1525,1548,1571,1594,1617,1640,1664,1687, 1710,1734,1757,1781,1804,1828,1851,1875,1899,1922,1946,1969,1993,2016, 2040,2063,2086,2110,2133,2156,2179,2202,2225,2248,2271,2293,2316,2339, 2361,2383,2405,2427,2449,2471,2492,2514,2535,2556,2577,2598,2618,2639, 2659,2679,2699,2718,2738,2757,2776,2794,2813,2831,2849,2867,2885,2902, 2919,2936,2952,2968,2984,3000,3016,3031,3046,3060,3075,3089,3102,3116, 3129,3141,3154,3166,3178,3189,3201,3212,3222,3232,3242,3252,3261,3270, 3278,3286,3294,3302,3309,3315,3322,3328,3334,3339,3344,3348,3353,3357, 3360,3363,3366,3368,3370,3372,3373,3374,3375,3375,3375,3374,3373,3372, 3370,3368,3366,3363,3360,3357,3353,3348,3344,3339,3334,3328,3322,3315, 3309,3302,3294,3286,3278,3270,3261,3252,3242,3232,3222,3212,3201,3189, 3178,3166,3154,3141,3129,3116,3102,3089,3075,3060,3046,3031,3016,3000, 2984,2968,2952,2936,2919,2902,2885,2867,2849,2831,2813,2794,2776,2757, 2738,2718,2699,2679,2659,2639,2618,2598,2577,2556,2535,2514,2492,2471, 2449,2427,2405,2383,2361,2339,2316,2293,2271,2248,2225,2202,2179,2156, 2133,2110,2086,2063,2040,2016,1993,1969,1946,1922,1899};
void main(void) {
InitSysCtrl(); InitEPwm1Gpio(); InitEPwm2Gpio();
DINT;
InitPieCtrl(); IER = 0x0000; IFR = 0x0000;
InitPieVectTable();
EALLOW;
PieVectTable.EPWM1_INT = &epwm1_timer_isr; PieVectTable.EPWM2_INT = &epwm2_timer_isr; EDIS;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; EDIS;
InitEPwm1Example(); InitEPwm2Example();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; EDIS;
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
EINT; ERTM;
for(;;) {
asm(\); } }
void InitEPwm1Example() {
EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD; EPwm1Regs.TBPHS.half.TBPHS = 0x0000; EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.CMPA.half.CMPA = 1500; EPwm1Regs.CMPB = 1500;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD;
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; EPwm1Regs.AQCTLA.bit.CAD = AQ_SET; EPwm1Regs.AQCTLB.bit.CAU = AQ_SET; EPwm1Regs.AQCTLB.bit.CAD = AQ_CLEAR;
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;
EPwm1Regs.DBCTL.all = 0xb; EPwm1Regs.DBRED = 60; EPwm1Regs.DBFED = 60; }
void InitEPwm2Example() {
EPwm2Regs.TBPRD = EPWM2_TIMER_TBPRD; EPwm2Regs.TBPHS.half.TBPHS = 0x0000; EPwm2Regs.TBCTR = 0x0000;
EPwm2Regs.CMPA.half.CMPA =1500; EPwm2Regs.CMPB = 1500;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO_PRD; EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO_PRD;
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; EPwm2Regs.AQCTLA.bit.CAD = AQ_SET; EPwm2Regs.AQCTLB.bit.CAU = AQ_SET; EPwm2Regs.AQCTLB.bit.CAD = AQ_CLEAR;
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; EPwm2Regs.ETSEL.bit.INTEN = 1;
EPwm2Regs.ETPS.bit.INTPRD = ET_1ST;
EPwm1Regs.DBCTL.all = 0xb; EPwm1Regs.DBRED = 60; EPwm1Regs.DBFED = 60; }
interrupt void epwm1_timer_isr(void) {
if(k >= 400) { k = 0; } EPwm1Regs.CMPA.half.CMPA = TonC[k]; EPwm1Regs.CMPB = TonC[k]; k++;
EPwm1Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3; }
interrupt void epwm2_timer_isr(void) {
if(k >= 400) { k = 0;
} EPwm2Regs.CMPA.half.CMPA = TonC[k]; EPwm2Regs.CMPB = TonC[k]; k++;
EPwm2Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3; }