Slave SelectMAP模式下：
可以设置为DSP boot 还是arm boot， 需要的信号：
CCLK： 写使能 CS_B： 片选 RDWR_B：GPIO
slave serial模式下：
可以设置为DSP boot 还是arm boot，
CCLK： GPIO D_IN： GPIO
7、DSP设置： AEA19/BOOTMODE3 AEA18/BOOTMODE2 AEA17/BOOTMODE1 AEA16/BOOTMODE0 设置 Boot模式： 0000 - No boot (default mode) 0001 - Host boot (HPI) 0010 -Reserved 0011 - Reserved 0100 - EMIFA 8-bit ROM boot 0101 - Master I2C boot 0110 - Slave I2C boot 0111 - Host boot (PCI) 1000 thru 1111 - Serial Rapid I/O boot configurations ?EMIFA 输入时钟选择 0 - AECLKIN (default mode) 1 - SYSCLK4 (CPU/x) Clock Rate. The SYSCLK4 clock rate is software selectable via the Software PLL1 Controller. By default, SYSCLK4 is selected as CPU/8 clock rate. HPI总线宽度选择 0 - HPI operates as an HPI16 (default). (HPI bus is 16 bits wide. HD[15:0] pins are used and the remaining HD[31:16] pins are reserved pins in the Hi-Z state.) 1 - HPI operates as an HPI32. ?Device Endian mode (LENDIAN) 0 - System operates in Big Endian mode 1 - System operates in Little Endian mode(default) UTOPIA Enable bit (UTOPIA_EN) UTOPIA peripheral enable(functional) 0 - UTOPIA disabled; Ethernet MAC (EMAC) and MDIO enable(default). EMAC/MDIO configuration (interface)[MII, RMII, GMII or the standalone RGMII] is controlled by theMACSEL[1:0] bits. 1 - UTOPIA enabled; EMAC and MDIO disabled [except when the MACSEL[1:0] bits = 11 then, the EMAC/MDIO RGMII interface is still functional]. And if MACSEL[1:0] = 11, the RGMII standalone pin functions can be used. CFGGP[2:0] pins must be set to 000b during reset for proper operation of the PCI boot mode. AEA15/AECLKIN_SEL 0 AEA14/HPI_WIDTH AEA13/LENDIAN 1 AEA12/UTOPIA_EN 设置 1 AEA11 1 必须接1k下拉电阻 EMAC/MDIO interface select bits AEA10/MACSEL1 AEA9/MACSEL0 AEA8/PCI_EEAI 0 AEA8: PCI auto-initialization via external I2C EEPROM If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up. 0 - PCI auto-initialization through I2C EEPROM is disabled (default). 1 - PCI auto-initialization through I2C EEPROM is enabled. AEA7 0 PCI Frequency Selection (PCI66) 0 - PCI operates at 33 MHz (default). 1 - PCI operates at 66 MHz. If the PCI peripheral is disabled (PCI_EN = 0), this pin must not be pulled up. AEA6/PCI66 AEA5/MCBSP1_EN ASEYAS4C/LKOUT_EN AEA3 AEA2/CFGGP2 AEA1/CFGGP1 AEA0/CFGGP0 0 0 1 000 McBSP1 Enable bit (MCBSP1_EN) 0 - GPIO pin functions enabled (default). 1 - McBSP1 pin functions enabled. SYSCLKOUT Enable pin (SYSCLKOUT_EN) 0 - GP[1] pin function of the SYSCLK4/GP[1] pin enabled (default). 1 - SYSCLK4 pin function of the SYSCLK4/GP[1] pin enabled. SRIO使能： 上拉 SRIO不使能：下拉 Configuration GPI (CFGGP[2:0]) (AEA[2:0]) These pins are latched during reset and their values are shown in the DEVSTAT register. These values can be used by software routines for boot operations. 1 使能 1 使能 左 右
S12
左 右
S9/S11
左 右
S8/S10
DSP_EMIFA_BA0 DSP_EMIFA_ADD19 DSP_EMIFA_ ADD8 DSP_EMIFA_ ADD17
DSP_EMIFA_ ADD18 DSP_EMIFA_ ADD15 DSP_EMIFA_ ADD14 DSP_EMIFA_ ADD13 DSP_EMIFA_ ADD12 DSP_EMIFA_ ADD11 DSP_EMIFA_ ADD10 DSP_EMIFA_ ADD9 DSP_EMIFA_ ADD7
DSP_EMIFA_ ADD6 DSP_EMIFA_ ADD16 DSP_EMIFA_ ADD5 DSP_EMIFA_ ADD4 DSP_EMIFA_ ADD3 DSP_EMIFA_ ADD2 DSP_EMIFA_ ADD1 DSP_EMIFA_ ADD0 DSP_EMIFA_BA1
DDR2_EN BOOTMODE3 PCI_EEAI BOOTMODE1
BOOTMODE2 AECLKIN_SEL HPI_WIDTH LENDIAN UTOPIA_EN
MACSEL1 MACSEL0
PCI66 BOOTMODE0 MCBSP1_EN SYSCLKOUT En
SRIO使能 CFGGP2 CFGGP1 CFGGP0 EMIFA_EN
1 0 0 0
0 0 1 0 0 0 0 0
0 0 1 0 1 0 0 0 1
ABA1/EMIFA_EN ABA0/DDR2_EN