实验代码
主程序
module fdivision(RESET,F10M,out); input F10M,RESET; output out; reg out; reg[7:0] i;
always @(posedge F10M) if(!RESET) begin out<=0; i<=0; end
else if(i==2||i==3) begin
out=~out; i<=i+1; end
else if(i==5) i<=1; else
i<=i+1; endmodule
测试程序
`timescale 1ns/100ps
module division_top; reg F10M,RESET; wire out;
always #50 F10M=~F10M; initial begin
RESET=1; F10M=0;
#90 RESET=0; #100 RESET=1; #10000 $stop; end
fdivision fdivision(.RESET(RESET),.F10M(F10M),.out(out)); endmodule
实验四 阻塞赋值与非阻塞赋值的区别
实验内容
比较四种不同的写法，观察阻塞与非阻塞赋值的区别。 Blocking：
always @(posedge clk) begin b=a; c=b; end
Blocking1：
always @(posedge clk) begin c=b;
b=a; end
Blocking2：
always @(posedge clk) b=a; always @(posedge clk) c=b;
non_Blocking：
always@(posedge clk) begin b<=a; c<=b; End
实验仿真结果
实验代码
主程序
module blocking(clk,a,b,c); output[3:0] b,c; input[3:0] a; input clk; reg[3:0] b,c;
always @(posedge clk) begin b=a; c=b; end endmodule
测试部分
`timescale 1 ns/100 ps `include \`include \`include \`include \
module compareTop;
wire[3:0]b11,c11,b12,c12,b13,c13,b2,c2; reg[3:0]a;
reg clk; initial begin clk=0;
forever#50 clk=~clk; end initial begin a=4'h3;
$display(\ #100 a=4'h7; $display(\ #100 a=4'hf;
$display(\ #100 a=4'ha; $display(\ #100 a=4'h2; $display(\ #100 $stop; end
blocking blocking(clk,a,b11,c11); blocking1 blocking1(clk,a,b12,c12); blocking2 blocking2(clk,a,b13,c13); non_blocking non_blocking(clk,a,b2,c2); endmodule
实验五 用always块实现较复杂的组合逻辑
实验目的
运用always块设计一个8路数据选择器。要求：每路输入数据与输出数据均为4位2进制数，当选择开关（至少3位）或输入数据发生变化时，输出数据也相应地变化。
实验仿真结果
实验代码
主程序
module alu(out,opcode,a1,a2,a3,a4,a5,a6,a7,a8); output[3:0] out; reg[3:0] out;
input[3:0] a0,a1,a2,a3,a4,a5,a6,a7; input[2:0] opcode;
always@(opcode or a1 or a2 or a3 or a4 or a5 or a6 or a7 or a0) begin
case(opcode) 3'd0: out=a0; 3'd1: out=a1; 3'd2: out=a2; 3'd3: out=a3; 3'd4: out=a4; 3'd5: out=a5; 3'd6: out=a6; 3'd7: out=a7;
default:out=4'b0000; endcase end endmodule
测试程序