| Old Task | (VM=0)| (VM=1)| (VM=0)| (VM=1)| | +---------------+-------+-------+-------+-------+-------+
386 TSS (VM=0) | | | 309 | 226 | 282 | +-------+-------+-------+-------+-------+
386 TSS (VM=1) | | | 314 | 231 | 287 | +-------+-------+-------+-------+-------+
386 CPU/286 TSS | | | 307 | 224 | 280 | +-------+-------+-------+-------+-------+
486 CPU/286 TSS | 199 | 177 | | | 180 | +---------------------------------------+ Miscellaneous
- all timings are for best case and do not take into account wait states, instruction alignment, the state of the prefetch queue, DMA refresh cycles, cache hits/misses or exception processing. - to convert clocks to nanoseconds divide one microsecond by the processor speed in MegaHertz:
(1000MHz/(n MHz)) = X nanoseconds - see 8086 Architecture
FLAGS - Intel 8086 Family Flags Register |11|10|F|E|D|C|B|A|9|8|7|6|5|4|3|2|1|0|
| | | | | | | | | | | | | | | | | +--- CF Carry Flag | | | | | | | | | | | | | | | | +--- 1
| | | | | | | | | | | | | | | +--- PF Parity Flag | | | | | | | | | | | | | | +--- 0
| | | | | | | | | | | | | +--- AF Auxiliary Flag | | | | | | | | | | | | +--- 0
| | | | | | | | | | | +--- ZF Zero Flag | | | | | | | | | | +--- SF Sign Flag
| | | | | | | | | +--- TF Trap Flag (Single Step) | | | | | | | | +--- IF Interrupt Flag | | | | | | | +--- DF Direction Flag | | | | | | +--- OF Overflow flag
| | | | +----- IOPL I/O Privilege Level (286+ only) | | | +----- NT Nested Task Flag (286+ only) | | +----- 0
| +----- RF Resume Flag (386+ only)
+------ VM Virtual Mode Flag (386+ only)
- see PUSHF POPF STI CLI STD CLD
MSW - Machine Status Word (286+ only)
|31|30-5|4|3|2|1|0| Machine Status Word
| | | | | | +---- Protection Enable (PE) | | | | | +----- Math Present (MP) | | | | +------ Emulation (EM) | | | +------- Task Switched (TS) | | +-------- Extension Type (ET) | +---------- Reserved +------------- Paging (PG)
Bit 0 PE Protection Enable, switches processor between protected and real mode
Bit 1 MP Math Present, controls function of the WAIT instruction
Bit 2 EM Emulation, indicates whether coprocessor functions are to be emulated
Bit 3 TS Task Switched, set and interrogated by coprocessor on task switches and when interpretting coprocessor instructions
Bit 4 ET Extension Type, indicates type of coprocessor in system Bits 5-30 Reserved
bit 31 PG Paging, indicates whether the processor uses page tables to translate linear addresses to physical addresses - see SMSW LMSW
8086/80186/80286/80386/80486 Instruction Set AAA - Ascii Adjust for Addition Usage: AAA
Modifies flags: AF CF (OF,PF,SF,ZF undefined)
Changes contents of AL to valid unpacked decimal. The high order nibble is zeroed.
Clocks Size Operands 808x 286 386 486 Bytes none 8 3 4 3 1
AAD - Ascii Adjust for Division Usage: AAD
Modifies flags: SF ZF PF (AF,CF,OF undefined)
Used before dividing unpacked decimal numbers. Multiplies AH by 10 and the adds result into AL. Sets AH to zero. This instruction is also known to have an undocumented behavior. AL := 10*AH+AL AH := 0
Clocks Size
Operands 808x 286 386 486 Bytes none 60 14 19 14 2
AAM - Ascii Adjust for Multiplication Usage: AAM
Modifies flags: PF SF ZF (AF,CF,OF undefined) AH := AL / 10 AL := AL mod 10
Used after multiplication of two unpacked decimal numbers, this instruction adjusts an unpacked decimal number. The high order nibble of each byte must be zeroed before using this instruction. This instruction is also known to have an undocumented behavior. Clocks Size Operands 808x 286 386 486 Bytes none 83 16 17 15 2
AAS - Ascii Adjust for Subtraction Usage: AAS
Modifies flags: AF CF (OF,PF,SF,ZF undefined)
Corrects result of a previous unpacked decimal subtraction in AL. High order nibble is zeroed.
Clocks Size Operands 808x 286 386 486 Bytes none 8 3 4 3 1
ADC - Add With Carry
Usage: ADC dest,src
Modifies flags: AF CF OF SF PF ZF
Sums two binary operands placing the result in the destination. If CF is set, a 1 is added to the destination.
Clocks Size Operands 808x 286 386 486 Bytes reg,reg 3 2 2 1 2
mem,reg 16+EA 7 7 3 2-4 (W88=24+EA) reg,mem 9+EA 7 6 2 2-4 (W88=13+EA) reg,immed 4 3 2 1 3-4
mem,immed 17+EA 7 7 3 3-6 (W88=23+EA) accum,immed 4 3 2 1 2-3
ADD - Arithmetic Addition
Usage: ADD dest,src
Modifies flags: AF CF OF PF SF ZF
Adds \
Both operands are binary.
Clocks Size Operands 808x 286 386 486 Bytes reg,reg 3 2 2 1 2
mem,reg 16+EA 7 7 3 2-4 (W88=24+EA) reg,mem 9+EA 7 6 2 2-4 (W88=13+EA) reg,immed 4 3 2 1 3-4
mem,immed 17+EA 7 7 3 3-6 (W88=23+EA) accum,immed 4 3 2 1 2-3
AND - Logical And
Usage: AND dest,src
Modifies flags: CF OF PF SF ZF (AF undefined)
Performs a logical AND of the two operands replacing the destination with the result.
Clocks Size Operands 808x 286 386 486 Bytes reg,reg 3 2 2 1 2
mem,reg 16+EA 7 7 3 2-4 (W88=24+EA) reg,mem 9+EA 7 6 1 2-4 (W88=13+EA) reg,immed 4 3 2 1 3-4
mem,immed 17+EA 7 7 3 3-6 (W88=23+EA) accum,immed 4 3 2 1 2-3
ARPL - Adjusted Requested Privilege Level of Selector (286+ PM) Usage: ARPL dest,src (286+ protected mode) Modifies flags: ZF
Compares the RPL bits of \ If the RPL bits of \
equal to the source RPL bits and the Zero Flag is set. Otherwise the Zero Flag is cleared.
Clocks Size Operands 808x 286 386 486 Bytes reg,reg - 10 20 9 2 mem,reg - 11 21 9 4
BOUND - Array Index Bound Check (80188+) Usage: BOUND src,limit Modifies flags: None
Array index in source register is checked against upper and lower bounds in memory source. The first word located at \
the lower boundary and the word at \ Interrupt 5 occurs if the source value is less than or higher than
the source.
Clocks Size Operands 808x 286 386 486 Bytes reg16,mem32 - nj=13 nj=10 7 2 reg32,mem64 - nj=13 nj=10 7 2 - nj = no jump taken
BSF - Bit Scan Forward (386+)
Usage: BSF dest,src Modifies flags: ZF
Scans source operand for first bit set. Sets ZF if a bit is found set and loads the destination with an index to first set bit. Clears ZF is no bits are found set. BSF scans forward across bit pattern (0-n) while BSR scans in reverse (n-0).
Clocks Size Operands 808x 286 386 486 Bytes reg,reg - - 10+3n 6-42 3 reg,mem - - 10+3n 7-43 3-7 reg32,reg32 - - 10+3n 6-42 3-7 reg32,mem32 - - 10+3n 7-43 3-7
BSR - Bit Scan Reverse (386+) Usage: BSR dest,src Modifies flags: ZF
Scans source operand for first bit set. Sets ZF if a bit is found set and loads the destination with an index to first set bit. Clears ZF is no bits are found set. BSF scans forward across bit pattern (0-n) while BSR scans in reverse (n-0).
Clocks Size Operands 808x 286 386 486 Bytes reg,reg - - 10+3n 6-103 3 reg,mem - - 10+3n 7-104 3-7 reg32,reg32 - - 10+3n 6-103 3-7 reg32,mem32 - - 10+3n 7-104 3-7
BSWAP - Byte Swap (486+) Usage: BSWAP reg32 Modifies flags: none
Changes the byte order of a 32 bit register from big endian to little endian or vice versa. Result left in destination register is undefined if the operand is a 16 bit register.
Clocks Size Operands 808x 286 386 486 Bytes reg32 - - - 1 2