END IF; END IF; END PROCESS;
END ARCHITECTURE ART;
4选1选择器与扫描器 sel.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY sel IS
PORT(QIN1,QIN2,QIN3:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
CLK,RST:IN STD_LOGIC;
QOUT:OUT STD_LOGIC_VECTOR(3 DOWNTO 0); sel:OUT STD_LOGIC_VECTOR(7 DOWNTO 0)); END sel;
ARCHITECTURE ART OF sel IS
BEGIN
PROCESS(CLK,RST)
VARIABLE CNT:INTEGER RANGE 0 TO 2;
BEGIN IF (RST='0') THEN CNT:=0; sel<=\QOUT<=\
ELSIF CLK'EVENT AND CLK='1' THEN
IF CNT=2 THEN
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CNT:=0; ELSE CNT:=CNT+1;
END IF; CASE CNT IS
WHEN 0=>QOUT<=QIN1; sel<=\
WHEN 1=>QOUT<=QIN2; sel<=\
WHEN 2=>QOUT<=QIN3; sel<=\
WHEN OTHERS=>QOUT<=\sel<=\
END CASE; END IF; END PROCESS; END ARCHITECTURE ART;
5.3 显示模块
1)功能介绍
将密码用BCD七段数码管显示 2)显示模块与仿真波形图5.3，如下图
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图5.3
上图将BCD码转化到七段译码电路上
表5-3 BCD-七段数码管的真值表
输入输出
D C B A Y1 Y2 Y3 Y4 Y5 Y6 Y7字形 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 1 2 0 0 1 1 0 1 1 1 0 0 1 3 0 1 0 0 0 1 1 0 0 1 1 4 0 1 0 1 1 0 1 1 0 1 1 5 0 1 1 0 1 0 1 1 1 1 1 6 0 1 1 1 1 1 1 0 0 0 0 7 1 0 0 0 1 1 1 1 1 1 1 8 1 0 0 1 1 1 1 0 0 1 1 9 16
表5-3
在文本区内输入程序，程序如下： Seg7.vhd LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY Seg7 IS
PORT(num:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
led:OUT STD_LOGIC_VECTOR(6 DOWNTO 0));
END Seg7;
ARCHITECTURE ACT OF Seg7 IS BEGIN
LED<=\ \ \ \
\\\\\\\\\\\
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\END ACT;
6.总体设计电路图
1）功能介绍
将各个模块连接在一起实现。 2）顶层文件如下：
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