交通灯信号控制器VHDL文本输入设计(2)

U1:JTDKZ PORT MAP(CLK=>CLK,SM=>SM,SB=>SB,MR=>MR,MY0=>EN2,MG0=>EN1,BR=>BR,BY0=>EN4,BG0=>EN3); U2:CSKZ PORT MAP(INA=>EN1,OUTA=>MG); U3:CSKZ PORT MAP(INA=>EN2,OUTA=>MY); U4:CSKZ PORT MAP(INA=>EN3,OUTA=>BG); U5:CSKZ PORT MAP(INA=>EN4,OUTA=>BY);

U6:CNT45S PORT MAP(CLK=>CLK,SB=>SB,EN45=>EN1,DOUT45M=>S45M,DOUT45B=>S45B); U7:CNT05S PORT MAP(CLK=>CLK,EN05M=>EN2,DOUT5=>S05,EN05B=>EN4); U8:CNT25S PORT MAP(CLK=>CLK,SM=>SM,SB=>SB,EN25=>EN3,DOUT25M=>S25M,DOUT25B=>S25B); U9:XSKZ PORT MAP(EN45=>EN1,EN05M=>EN2,EN25=>EN3,EN05B=>EN4, AIN45M=>S45M,AIN45B=>S45B,AIN25M=>S25M,AIN25B=>S25B,AIN05=>S05, DOUTM=>DOUT1,DOUTB=>DOUT2); END ARCHITECTURE ART;

若SM 1 SB 1 LCK 时钟信号

若SM 时钟信号(4) SB 时钟信号(2) LCK 时钟信号(1)