EM78P372N数据手册
EM78P372N8-Bit Microcontroller R2 and hardware stacks are 11-bit wide. The structure is depicted in the table under Section 6.1.3.1 Data Memory Configuration. The configuration structure generates 2K×13 bits on-chip ROM addresses to the relative programming instruction codes. One program page is 1024 words long. The contents of R2 are all set to "0"s when a reset condition occurs. "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus, "JMP" allows PC to jump to any location within a page. "CALL" instruction loads the lower 10 bits of the PC, and PC+1 are pushed onto the stack. Thus, the subroutine entry address can be located anywhere within a page. "LJMP" instruction allows direct loading of the program counter bits (A0~A10). Therefore, "LJMP" allows PC to jump to any location within 2K (211). "LCALL" instruction loads the program counter bits (A0 ~A10), and then PC+1 is pushed onto the stack. Thus, the subroutine entry address can be located anywhere within 2K (211) "RET" ("RETL k", "RETI") instruction loads the program counter with the contents of the top of stack. "ADD R2, A" allows a relative address to be added to the current PC, and the ninth and above bits of the PC will increase progressively. "MOV R2, A" allows loading of an address from the "A" register to the lower 8 bits of the PC, and the ninth and tenth bits (A8 ~ A9) of the PC will remain unchanged. Any instruction (except “ADD R2,A”) that is written to R2 (e.g., "MOV R2, A", "BC R2, 6", etc.) will cause the ninth bit and the tenth bit (A8 ~ A9) of the PC to remain unchanged. All instructions are single instruction cycle (fclk/2) except “LCALL” and “LJMP” instructions. The “LCALL” and “LJMP” instructions need two instructions cycle. Product Specification (V1.1) 05.24.2011(This specification is subject to change without further notice) 7