东北林业大学
单片机原理实验课程设计 二号黑体居中 间距约3cm 距上约5cm
总 结 报 告
6cm 间距约
字号：初号，黑体居中
小三号黑体 小三号楷体
设计项目： 基于Fusion单芯片的电话录音系统的设计 项目完成人： 张小海 、赵大海、王晓明 指导教师： 王 明 教授 学 院： 信息与计算机工程学院 专 业： 电子信息工程2007级1班
小三号黑体，本页最后一行 指导教师一栏填写指导教师姓名、职称 年 月 日
综合电子课程设计任务书
学生姓名 学生姓名 设计项目 学号 学号 专业（班级） 专业（班级） 设计内容 主要技 术指标 和要求 设计所用仪器设备 工作计划 参考资料 指导教师签字
基于Fusion单芯片的电话录音系统的设计
摘 要
三号黑体 摘要前必须有题目，小二黑体，居中放置
本设计主要研究一种基于数字通信的电话录音系统的设计方案。目前在国内已有现成的USB电话录音盒的产品，技术已经相当成熟，它是专门为小公司而设计开发的，具有经济、稳定、高效的特点。USB接口安装安装方便，即插即用，不需要其他配件就可以对电话进行录音。但是采用的都是专用解码芯片，为了提高运用PFGA的能力，本设计采用FPGA进行FSK来电显示解码，语音采集以及进行核心控制，实现单芯片系统的设计。
电话录音系统主要由上位机和下位机两部分组成。下位机由Actel公司的Fusion系列FPGA实现，主要负责来电号码识别，去电号码识别以及语音采样。来电的号码识别通过FPGA对FSK信号进行解码来完成，去电号码识别通过专用DTMF解码芯片MT8870完成，语音采样则由FPGA内部集成的ADC完成。上位机由VC6.0编写，程序用ODBC（开放数据库互连）连接了Excel作为数据库。通话的号码、时间、类型等信息都会被存储到数据库当中，通话的语音则以WAV文件的形式保存。上位机与下位机通过RS232接口通信。
本系统完成的功能是在有来电时，上位机软件能够从最小托盘处弹出，并显示来电号码，若此号码在数据库中有对应的联系人，将显示此联系人的姓名。若摘机，软件同样会自动弹出，显示去电号码，若有对应联系人，将显示姓名。并将所有通话记录以及通话语音进行存储，便于用户查询。
小四宋体，中文
关键词：Fusion；FPGA；来电显示；FSK解码；DTMF
摘要字数400左右
小四宋体加黑
Design for telephone recording based on Fusion single-chip
Abstract 英文题目，小二号Times New Roman加黑 This design mainly studies the precept of digital communication based on the telephone Times New Romanrecording. At present, there are ready-made in China USB telephone recording box of products, 三号加黑and the technology is already quite mature which is specifically designed for small companies to develop, economically, stable, high-performance characteristics. USB interface is easy to install, plug and play, no other accessories can be recorded on the phone. But the chips used are all dedicated decoder chips, in order to enhance the ability to use PFGA, the design uses FPGA to decode FSK caller ID, voice capture, as well as the core of control, to achieve single-chip solution.
Telephone recording system is mainly grouped with the upper and lower plane. Subordinate machine , implemented by Actel's Fusion family FPGA, is mainly responsible for CID, to identify dialed number, as well as voice sample.CID?s achievement is through the FSK?s decoding by FPGA. The identification of dialed numbers is completed by a dedicated DTMF decoder chip MT8870.Voice sampling is completed by the internal FPGA integrated ADC. PC is developed by VC6.0, procedures use ODBC (open database connectivity) to connect the Excel as a database. Calling number, timing, type and other information will be stored to the database, the voice of calls are to preserve the form of WAV files. Position machine is communicated with Subordinate machine through the RS232 interface.
The function of the function of the system is in a call, the host computer software to Office, from the smallest pop-up tray and displays caller ID, if the number in the database has corresponding contacts, will show the name of this contact. If the removable is drived, the software will automatically pop up, indicating to the power numbers, if the corresponding contact, the name will be displayed. All calls will be recorded, as well as voice calls for storage. Key words：Fusion; FPGA; CID; FSK Decoder; DTMF
Times New Roman小四,英文采用1.5倍行距 Times New Roman小四，加黑
目 录
一级题序用小四宋体加黑
三号黑体
摘要 Abstract Times New Roman小四号加黑，中、英文摘要不编页码。 1.1 课题研究的背景和意义 ........................................................................................................... 1 1 绪论 ........................................................................................................................................... 1 1.2 本设计的主要要求 ................................................................................................................... 1 1.2.1 基本要求 ............................................................................................................................... 1 1.2.2 扩展功能要求 ....................................................................................................................... 1 2
系统方案选择 ........................................................................................................................... 2 2.1 系统方案实现 ........................................................................................................................... 2 2.2 下位机核心控制 ....................................................................................................................... 2 2.2.1 器件选择 ............................................................................................................................... 2 二级以下(包括二2.2.2 控制方案选择 ....................................................................................................................... 3 2.3 来电号码识别 ........................................................................................................................... 3 2.3.1 来电数据的格式 ................................................................................................................... 3 2.3.2 来电数据的传输制式 ........................................................................................................... 3 2.3.3 来电数据的解调解码 ........................................................................................................... 4 2.4 去电号码识别 ........................................................................................................................... 4 2.5 语音记录方式 ........................................................................................................................... 5 2.5.1 WAV格式简介 ..................................................................................................................... 5 2.5.2 WAV文件头 ......................................................................................................................... 6 2.6 通信协议定义 ........................................................................................................................... 6 3
硬件设计 ................................................................................................................................... 8 小四宋体加黑
级题序)用小四宋体 3.1 系统硬件设计框图 ................................................................................................................... 8 3.2 电源设计 ................................................................................................................................... 8
3.3 FPGA最小系统设计 ............................................................................................................... 9 3.3.1 时钟和复位电路 ................................................................................................................... 9 3.3.2 FPGA电源和接地 ................................................................................................................ 9