K60 - GPIO头文件分析

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1. /* ---------------------------------------------------------------------------- 2. -- PORT

3. ---------------------------------------------------------------------------- */ 4. 5. /**

6. * @addtogroup PORT_Peripheral PORT 7. * @{ 8. */ 9.

10. /** PORT - Peripheral register structure */ 11. typedef struct PORT_MemMap {

12. uint32_t PCR[32]; /**< Pin Control Register

n, array offset: 0x0, array step: 0x4 */

13. uint32_t GPCLR; /**< Global Pin Control L

ow Register, offset: 0x80 */

14. uint32_t GPCHR; /**< Global Pin Control H

igh Register, offset: 0x84 */ 15. uint8_t RESERVED_0[24];

16. uint32_t ISFR; /**< Interrupt Status Fla

g Register, offset: 0xA0 */ 17. uint8_t RESERVED_1[28];

18. uint32_t DFER; /**< Digital Filter Enabl

e Register, offset: 0xC0 */

19. uint32_t DFCR; /**< Digital Filter Clock

Register, offset: 0xC4 */

20. uint32_t DFWR; /**< Digital Filter Width

Register, offset: 0xC8 */ 21. } volatile *PORT_MemMapPtr; 22.

23. /* ----------------------------------------------------------------------------

24. -- PORT - Register accessor macros

25. ---------------------------------------------------------------------------- */ 26. 27. /**

28. * @addtogroup PORT_Register_Accessor_Macros PORT - Register accessor macros

29. * @{ 30. */ 31.

32.

33. /* PORT - Register accessors */

34. #define PORT_PCR_REG(base,index) ((base)->PCR[index]) 35. #define PORT_GPCLR_REG(base) ((base)->GPCLR) 36. #define PORT_GPCHR_REG(base) ((base)->GPCHR) 37. #define PORT_ISFR_REG(base) ((base)->ISFR) 38. #define PORT_DFER_REG(base) ((base)->DFER) 39. #define PORT_DFCR_REG(base) ((base)->DFCR) 40. #define PORT_DFWR_REG(base) ((base)->DFWR) 41. 42. /** 43. * @}

44. */ /* end of group PORT_Register_Accessor_Macros */ 45. 46.

47. /* ----------------------------------------------------------------------------

48. -- PORT Register Masks

49. ---------------------------------------------------------------------------- */ 50. 51. /**

52. * @addtogroup PORT_Register_Masks PORT Register Masks 53. * @{ 54. */ 55.

56. /* PCR Bit Fields */

57. #define PORT_PCR_PS_MASK 0x1u 58. #define PORT_PCR_PS_SHIFT 0 59. #define PORT_PCR_PE_MASK 0x2u 60. #define PORT_PCR_PE_SHIFT 1 61. #define PORT_PCR_SRE_MASK 0x4u 62. #define PORT_PCR_SRE_SHIFT 2 63. #define PORT_PCR_PFE_MASK 0x10u 64. #define PORT_PCR_PFE_SHIFT 4 65. #define PORT_PCR_ODE_MASK 0x20u 66. #define PORT_PCR_ODE_SHIFT 5 67. #define PORT_PCR_DSE_MASK 0x40u 68. #define PORT_PCR_DSE_SHIFT 6 69. #define PORT_PCR_MUX_MASK 0x700u 70. #define PORT_PCR_MUX_SHIFT 8

71. #define PORT_PCR_MUX(x) (((uint32_t)(((uint32_t)(x)

)<

72. #define PORT_PCR_LK_MASK 0x8000u

73. #define PORT_PCR_LK_SHIFT 15 74. #define PORT_PCR_IRQC_MASK 0xF0000u 75. #define PORT_PCR_IRQC_SHIFT 16

76. #define PORT_PCR_IRQC(x) (((uint32_t)(((uint32_t)(x)

)<

77. #define PORT_PCR_ISF_MASK 0x1000000u 78. #define PORT_PCR_ISF_SHIFT 24 79. /* GPCLR Bit Fields */

80. #define PORT_GPCLR_GPWD_MASK 0xFFFFu 81. #define PORT_GPCLR_GPWD_SHIFT 0

82. #define PORT_GPCLR_GPWD(x) (((uint32_t)(((uint32_t)(x)

)<

83. #define PORT_GPCLR_GPWE_MASK 0xFFFF0000u 84. #define PORT_GPCLR_GPWE_SHIFT 16

85. #define PORT_GPCLR_GPWE(x) (((uint32_t)(((uint32_t)(x)

)<

87. #define PORT_GPCHR_GPWD_MASK 0xFFFFu 88. #define PORT_GPCHR_GPWD_SHIFT 0

89. #define PORT_GPCHR_GPWD(x) (((uint32_t)(((uint32_t)(x)

)<

90. #define PORT_GPCHR_GPWE_MASK 0xFFFF0000u 91. #define PORT_GPCHR_GPWE_SHIFT 16

92. #define PORT_GPCHR_GPWE(x) (((uint32_t)(((uint32_t)(x)

)<

94. #define PORT_ISFR_ISF_MASK 0xFFFFFFFFu 95. #define PORT_ISFR_ISF_SHIFT 0

96. #define PORT_ISFR_ISF(x) (((uint32_t)(((uint32_t)(x)

)<

98. #define PORT_DFER_DFE_MASK 0xFFFFFFFFu 99. #define PORT_DFER_DFE_SHIFT 0

100. #define PORT_DFER_DFE(x) (((uint32_t)(((uint32_t)(x

))<

102. #define PORT_DFCR_CS_MASK 0x1u 103. #define PORT_DFCR_CS_SHIFT 0 104. /* DFWR Bit Fields */

105. #define PORT_DFWR_FILT_MASK 0x1Fu 106. #define PORT_DFWR_FILT_SHIFT 0

107. #define PORT_DFWR_FILT(x) (((uint32_t)(((uint32_t)(x

))<

109. /** 110. * @}

111. */ /* end of group PORT_Register_Masks */ 112. 113.

114. /* PORT - Peripheral instance base addresses */ 115. /** Peripheral PORTA base pointer */

116. #define PORTA_BASE_PTR ((PORT_MemMapPtr)0x4004900

0u)

117. /** Peripheral PORTB base pointer */

118. #define PORTB_BASE_PTR ((PORT_MemMapPtr)0x4004A00

0u)

119. /** Peripheral PORTC base pointer */

120. #define PORTC_BASE_PTR ((PORT_MemMapPtr)0x4004B00

0u)

121. /** Peripheral PORTD base pointer */

122. #define PORTD_BASE_PTR ((PORT_MemMapPtr)0x4004C00

0u)

123. /** Peripheral PORTE base pointer */

124. #define PORTE_BASE_PTR ((PORT_MemMapPtr)0x4004D00

0u) 125.

126. /* ----------------------------------------------------------------------------

127. -- PORT - Register accessor macros

128. ---------------------------------------------------------------------------- */ 129. 130. /**

131. * @addtogroup PORT_Register_Accessor_Macros PORT - Register accessor macro

s 132. * @{ 133. */ 134. 135.

136. /* PORT - Register instance definitions */ 137. /* PORTA */

138. #define PORTA_PCR0 PORT_PCR_REG(PORTA_BASE_PT

R,0)

139. #define PORTA_PCR1 PORT_PCR_REG(PORTA_BASE_PT

R,1)

140. #define PORTA_PCR2 PORT_PCR_REG(PORTA_BASE_PT

R,2)

141. #define PORTA_PCR3 PORT_PCR_REG(PORTA_BASE_PT

R,3)

142. #define PORTA_PCR4 PORT_PCR_REG(PORTA_BASE_PT

R,4)

143. #define PORTA_PCR5 PORT_PCR_REG(PORTA_BASE_PT

R,5)

144. #define PORTA_PCR6 PORT_PCR_REG(PORTA_BASE_PT

R,6)

145. #define PORTA_PCR7 PORT_PCR_REG(PORTA_BASE_PT

R,7)

146. #define PORTA_PCR8 PORT_PCR_REG(PORTA_BASE_PT

R,8)

147. #define PORTA_PCR9 PORT_PCR_REG(PORTA_BASE_PT

R,9)

148. #define PORTA_PCR10 PORT_PCR_REG(PORTA_BASE_PT

R,10)

149. #define PORTA_PCR11 PORT_PCR_REG(PORTA_BASE_PT

R,11)

150. #define PORTA_PCR12 PORT_PCR_REG(PORTA_BASE_PT

R,12)

151. #define PORTA_PCR13 PORT_PCR_REG(PORTA_BASE_PT

R,13)

152. #define PORTA_PCR14 PORT_PCR_REG(PORTA_BASE_PT

R,14)

153. #define PORTA_PCR15 PORT_PCR_REG(PORTA_BASE_PT

R,15)

154. #define PORTA_PCR16 PORT_PCR_REG(PORTA_BASE_PT

R,16)

155. #define PORTA_PCR17 PORT_PCR_REG(PORTA_BASE_PT

R,17)

156. #define PORTA_PCR18 PORT_PCR_REG(PORTA_BASE_PT

R,18)

157. #define PORTA_PCR19 PORT_PCR_REG(PORTA_BASE_PT

R,19)

158. #define PORTA_PCR20 PORT_PCR_REG(PORTA_BASE_PT

R,20)

159. #define PORTA_PCR21 PORT_PCR_REG(PORTA_BASE_PT

R,21)

160. #define PORTA_PCR22 PORT_PCR_REG(PORTA_BASE_PT

R,22)

161. #define PORTA_PCR23 PORT_PCR_REG(PORTA_BASE_PT

R,23)

162. #define PORTA_PCR24 PORT_PCR_REG(PORTA_BASE_PT

R,24)