# -- Compiling module dffea # -- Compiling module dffeas # -- Compiling module prim_gtff # -- Compiling module tff # -- Compiling module tffe
# -- Compiling module prim_gjkff # -- Compiling module jkff # -- Compiling module jkffe
# -- Compiling module prim_gsrff # -- Compiling module srff # -- Compiling module srffe # -- Compiling module clklock # -- Compiling module alt_inbuf # -- Compiling module alt_outbuf # -- Compiling module alt_outbuf_tri # -- Compiling module alt_iobuf # -- Compiling module alt_inbuf_diff # -- Compiling module alt_outbuf_diff # -- Compiling module alt_outbuf_tri_diff # -- Compiling module alt_iobuf_diff # -- Compiling module alt_bidir_diff # -- Compiling module alt_bidir_buf # -- Compiling UDP PRIM_GDFF_LOW # -- Compiling UDP PRIM_GDFF_HIGH #
# Top level modules: # global # carry # cascade # carry_sum # exp # soft # opndrn # row_global # TRI
# lut_input # lut_output # latch # dlatch # dff # dffe # dffea # dffeas # tff
# tffe # jkff # jkffe # srff # srffe # clklock # alt_inbuf # alt_outbuf # alt_outbuf_tri # alt_iobuf # alt_inbuf_diff # alt_outbuf_diff # alt_outbuf_tri_diff # alt_iobuf_diff # alt_bidir_diff # alt_bidir_buf #
# vlib verilog_libs/lpm_ver
# ** Warning: (vlib-34) Library already exists at \#
# vmap lpm_ver ./verilog_libs/lpm_ver # Modifying modelsim.ini
# vlog -vlog01compat -work lpm_ver {d:/altera/11.1/quartus/eda/sim_lib/220model.v} # Model Technology ModelSim SE vlog 10.1a Compiler 2012.02 Feb 22 2012 # -- Compiling module LPM_MEMORY_INITIALIZATION # -- Compiling module LPM_HINT_EVALUATION # -- Compiling module LPM_DEVICE_FAMILIES # -- Compiling module lpm_constant # -- Compiling module lpm_inv # -- Compiling module lpm_and # -- Compiling module lpm_or # -- Compiling module lpm_xor # -- Compiling module lpm_bustri # -- Compiling module lpm_mux # -- Compiling module lpm_decode # -- Compiling module lpm_clshift # -- Compiling module lpm_add_sub # -- Compiling module lpm_compare # -- Compiling module lpm_mult # -- Compiling module lpm_divide # -- Compiling module lpm_abs # -- Compiling module lpm_counter # -- Compiling module lpm_latch # -- Compiling module lpm_ff
# -- Compiling module lpm_shiftreg # -- Compiling module lpm_ram_dq # -- Compiling module lpm_ram_dp # -- Compiling module lpm_ram_io # -- Compiling module lpm_rom # -- Compiling module lpm_fifo
# -- Compiling module lpm_fifo_dc_dffpipe # -- Compiling module lpm_fifo_dc_fefifo # -- Compiling module lpm_fifo_dc_async # -- Compiling module lpm_fifo_dc # -- Compiling module lpm_inpad # -- Compiling module lpm_outpad # -- Compiling module lpm_bipad #
# Top level modules: # lpm_constant # lpm_inv # lpm_and # lpm_or # lpm_xor # lpm_bustri # lpm_mux # lpm_decode # lpm_clshift # lpm_add_sub # lpm_compare # lpm_mult # lpm_divide # lpm_abs # lpm_counter # lpm_latch # lpm_ff
# lpm_shiftreg # lpm_ram_dq # lpm_ram_dp # lpm_ram_io # lpm_rom # lpm_fifo # lpm_fifo_dc # lpm_inpad # lpm_outpad # lpm_bipad #
# vlib verilog_libs/sgate_ver
# ** Warning: (vlib-34) Library already exists at \#
# vmap sgate_ver ./verilog_libs/sgate_ver # Modifying modelsim.ini
# vlog -vlog01compat -work sgate_ver {d:/altera/11.1/quartus/eda/sim_lib/sgate.v} # Model Technology ModelSim SE vlog 10.1a Compiler 2012.02 Feb 22 2012 # -- Compiling module oper_add # -- Compiling module oper_addsub # -- Compiling module mux21 # -- Compiling module io_buf_tri # -- Compiling module io_buf_opdrn # -- Compiling module oper_mult # -- Compiling module tri_bus # -- Compiling module oper_div # -- Compiling module oper_mod # -- Compiling module oper_left_shift # -- Compiling module oper_right_shift # -- Compiling module oper_rotate_left # -- Compiling module oper_rotate_right # -- Compiling module oper_less_than # -- Compiling module oper_mux # -- Compiling module oper_selector # -- Compiling module oper_decoder # -- Compiling module oper_bus_mux # -- Compiling module oper_latch #
# Top level modules: # oper_add # oper_addsub # mux21 # io_buf_tri # io_buf_opdrn # oper_mult # tri_bus # oper_div # oper_mod # oper_left_shift # oper_right_shift # oper_rotate_left # oper_rotate_right # oper_less_than # oper_mux # oper_selector # oper_decoder
# oper_bus_mux # oper_latch #
# vlib verilog_libs/altera_mf_ver
# ** Warning: (vlib-34) Library already exists at \#
# vmap altera_mf_ver ./verilog_libs/altera_mf_ver # Modifying modelsim.ini
# vlog -vlog01compat -work altera_mf_ver {d:/altera/11.1/quartus/eda/sim_lib/altera_mf.v} # Model Technology ModelSim SE vlog 10.1a Compiler 2012.02 Feb 22 2012 # -- Compiling module lcell
# -- Compiling module ALTERA_MF_MEMORY_INITIALIZATION # -- Compiling module ALTERA_MF_HINT_EVALUATION # -- Compiling module ALTERA_DEVICE_FAMILIES # -- Compiling module dffp # -- Compiling module pll_iobuf # -- Compiling module stx_m_cntr # -- Compiling module stx_n_cntr # -- Compiling module stx_scale_cntr # -- Compiling module MF_pll_reg # -- Compiling module MF_stratix_pll # -- Compiling module arm_m_cntr # -- Compiling module arm_n_cntr # -- Compiling module arm_scale_cntr # -- Compiling module MF_stratixii_pll # -- Compiling module ttn_m_cntr # -- Compiling module ttn_n_cntr # -- Compiling module ttn_scale_cntr # -- Compiling module MF_stratixiii_pll # -- Compiling module cda_m_cntr # -- Compiling module cda_n_cntr # -- Compiling module cda_scale_cntr # -- Compiling module MF_cycloneiii_pll
# -- Compiling module MF_cycloneiiigl_m_cntr # -- Compiling module MF_cycloneiiigl_n_cntr # -- Compiling module MF_cycloneiiigl_scale_cntr # -- Compiling module cycloneiiigl_post_divider # -- Compiling module MF_cycloneiiigl_pll # -- Compiling module altpll # -- Compiling module altlvds_rx # -- Compiling module stratix_lvds_rx
# -- Compiling module stratixgx_dpa_lvds_rx # -- Compiling module stratixii_lvds_rx # -- Compiling module flexible_lvds_rx