EDA Technology ,VHDL And Software
1.Introduction to EDA technology
EDA is the abbreviation of Electronic Design Automation . In the early 1990s ,it develop from the concepts such as computer aided Design (CAD), computer aided manufacturing (CAM), computer aided testing (CAT) and computer aided engineering (CAE) .
EDA technology is the core of the modern electronic design techniques, which rely on powerful computers . In EDA tools software platform, computer automatically completes logic simplification,logical partitions, logic synthesis , logic optimization ,logical simulation and other functions until the electronic circuit system achieves the stated performance. However, the realization of these function bases on the description of the system using the hardware description language HDL (Hardware Description language) .
EDA technology is a computer software system , which is developed on the basis of electronic CAD technology. It merges he latest achievements of electronic products ,such as application of electronic technology, computer technology and information processing and intelligent technology together to design automatically by computer working platform. Using EDA tools, electronic stylist can finish from concept, algorithm, agreement, etc, begin to design your electronic system a lot work can be finished by computer and electronic products can be from circuit design, performance analysis to design the IC territory or PCB layout the whole process of the computer automatically complete the processing.
Now on the concept of using EDA or category very wide. Included in machinery, electronics, communication, aerospace, chemical, mineral, biology, medicine, military and other fields, have EDA applications. Current EDA technology has in big companies, enterprises, institutions and teaching research departments extensive use. For example in the aircraft manufacturing process, from design, performance testing and characteristic analysis until a flight simulator, all may involve EDA technology. Globalization-the EDA technology, mainly in
electronic circuit design, PCB design and IC design.
EDA can be divided into system level and circuit-level and physical implementation level.
2.Introduction to VHDL
2.1Hardware Description Language
Hardware description language(HDLs) are a popular mode of design entry. In these,two popular HDLs are VHDL and Verilog. And now,I will mainly introduce VHDL.
VHDL is a hardware description language used to describe the behavior and structure of digital systems. VHDL is a general-purpose HDL that can be used to describe and simulate the operation of a wide variety of digital systems,ranging in complexity form a few gates to an interconnection of many complex integrated circuits. VHDL was originally developed under funding from the Department of Defense(DoD) to allow a uniform method for specifying digital systems. When VHDL was developed,the main purpose was to have a mechanism to describe and document hardware unambiguously. Synthesizing hardware from high-level descriptions was not one of the original purposes. The VHDL language has since become an IEEE(Institute of Electrical Engineers) standard,and it is widely used in industry. IEEE created a VHDL standard in 1987(VHDL-87) and later modified the standard in 1993(VHDL-93). Further revisions were done to the standard in 2000 and 2002.
VHDL can describe a digital system at several different levels—behavioral,data flow,and structural. For example,a binary adder could be described at the behavioral level in terms of its functions of adding two binary numbers without giving any implementation details. The same adder could be described at the data flow level by giving the logic equations for the adder. Finally,the adder could be described at the structural level by specifying the gates and the interconnections between the gates that comprise the adder.
VHDL leads naturally to a top-down design methodology,in which the system
is first specified at a high level and tested using a simulator.After the system is debugged at this level,the design can gradually be refined,eventually leading to a structural description closely related to the actual hardware implementation. VHDL was designed to be technology independent. If a design is described in VHDL and implemented in today”s technology,the same VHDL description could be used as a starting point for a design in some future technology. Although initially conceived as a hardware documentation language,most of VHDL can be used for simulation and logic synthesis.
Verilog is another popular HDL.It was developed by the industry at about the same time the U.S. DoD was funding the creation of VHDL. Verilog was introduced by Gateway Design Automation in 1984 as a proprietary HDL. Synopsis created synthesis tools for Verilog around 1988.Verilog become an IEEE standard in 1995.
VHDL has its syntactic roots in ADA while Verilog has its syntactic roots in C.ADA was a general-purpose programming language,also sponsored by the Department of Defense. Due to similarity with C,some find Verilog easier or less intimidating to learn. Many find VHDL to be excellent for supporting design and documentation of large systems. VHDL and Verilog enjoy approximately 50/50 market share.Both language can accomplish most requirements for digital design rather easily. Often design companies continue to use what they are used to,and hence,Verilog users continue to use Verilog and VHDL users continue to use VHDL. If you know one of these languages,it is no difficult to transition to the other.
More recently,there also have been efforts in system design languages such as System C,Handel-C,and System Verilog. System C is created as an extension to C++,and hence who are very comfortable with general-purpose software development find it less intimidating. These languages are primarily targeted at describing large digital systems at a high level of abstraction. They are primarily used for verification and validation. When different parts of a large system are designed by different teams,one team can use a system level behavioral description of the block being designed by the other team during initial design. Problems that might otherwise become obvious only during system integration may become evident in early stages reducing the design cycle for large systems. System-level
simulation languages are used during design of large systems. 2.2 Learning a Language
There are several challenges when you learn a new language,whether it be a language for common communication ,such as English,Chinese and so on,a computer like C, or a special-purpose language such as VHDL. If it is not your first language, you typically have a tendency to compare it to a language you know. In the case of VHDL ,if you already know another hardware description language, it is good to compete it with VHDL , but you should be careful when comparing it with language like C. VHDL and Verilog have a very different purpose than language like C, and a comparison with C is nor a meaningful activity.
When one learns language, one needs to study the alphabet of the new language, its vocabulary, grammar, syntax rules, and semantics of language description. The process of learning VHDL is not much different. One needs to learn the alphabet, vocabular or lexical elements of the language, syntax (grammar and rules), and semantics (meaning of description). VHDL-87 use the ASCII character set while VHDL-93 allows use of the full ISO character set. The ISO character set includes the ASCII characters and additionally includes accented characters. The ASCII character character set only includes the first 128 characters of the ISO character set. The lexical elements of the language include various identifies, reserved words, special symbols, and literals. The syntax or grammar determines what combinations of the lexical elements can be combined to make valid VHDL description. These are the rules that govern the use of different VHDL description. Then one needs to understand the semantics or meaning of VHDL descriptions. It is here that one understands what descriptions represent combinational hardware versus sequential hardware. And just like fluency in a natural language comes by speaking, reading, and writing the language, mastery of VHDL comes by repeated use of the language to create models for various digital system.
Since VHDL is a hardware description language, it differs from an ordinary programming language in several ways. Most importantly, VHDL has statements that execute concurrently since they must model real hardware in which the
components are all in operation at the same time. VHDL is popularly used for the purposes of describing, documenting, simulating, and automatically generating hardware. Hence, its constructs are tailored for these purposes.
EDA技术、VHDL与软件简介
1.EDA技术简介
EDA是电子设计自动化(Electronic Design Automation)的缩写,在20世纪90年代初从计算机辅助设计(CAD)、计算机辅助制造(CAM)、计算机辅助测试(CAT)和计算机辅助工程(CAE)的概念发展而来。
EDA技术就是以计算机为工具，设计者在EDA软件平台上，用硬件描述语言HDL完成设计文件，然后由计算机自动地完成逻辑编译、化简、分割、综合、优化、布局、布线和仿真，直至对于特定目标芯片的适配编译、逻辑映射和编程下载等工作。
EDA技术是在电子CAD技术基础上发展起来的计算机软件系统，是指以计算机为工作平台，融合了应用电子技术、计算机技术、信息处理及智能化技术的最新成果，进行电子产品的自动设计。
利用EDA工具，电子设计师可以从概念、算法、协议等开始设计电子系统，大量工作可以通过计算机完成，并可以将电子产品从电路设计、性能分析到设计出IC版图或PCB版图的整个过程的计算机上自动处理完成。
现在对EDA的概念或范畴用得很宽。包括在机械、电子、通信、航空航天、化工、矿产、生物、医学、军事等各个领域，都有EDA的应用。目前EDA技术已在各大公司、企事业单位和科研教学部门广泛使用。例如在飞机制造过程中，从设计、性能测试及特性分析直到飞行模拟，都可能涉及到EDA技术。本文所指的EDA技术，主要针对电子电路设计、PCB设计和IC设计。
EDA设计可分为系统级、电路级和物理实现级。