山东建筑大学
课 程 设 计 说 明 书
题 目： 课 程： 院 （部）： 专 业： 班 级： 学生姓名： 学 号： 指导教师： 完成日期： 基于ARM的串口通信系统的设计 嵌入式系统及应用课程设计 信息与电气工程学院 电子信息工程 电信082 王 涛 2008081265 高焕兵 2011年7月
山东建筑大学信电学院课程设计说明书
目 录
摘要···········································································································································II 1 设计目的·······························································································································1 2 设计要求·······························································································································1 3 设计内容·······························································································································2 3.1 S3C2410与串口通信概述·····························································································2 3.1.1S2C2410处理器概述·······························································································2 3.1.2 串口通信·············································································································· 3 3.2方案设计························································································································ 4 3.3电路设计························································································································ 4 3.3.1 电源设计·········································································································· · 4 3.3.2晶振电路············································································································· 5 3.3.3复位电路············································································································· 6 3.3.5存储器设计 ········································································································ 6 3.3.4 JTAG接口 ············································································································6 3.3.6串口电路 ·············································································································7 3.4软件设计···························································································································8 3.4.1 Boot loader 工作原理·····················································································8 3.4.2第一阶段·············································································································9 3.4.1第二阶段············································································································10 总结与致谢······························································································································11 参考文献··································································································································12 附录··········································································································································13
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山东建筑大学信电学院课程设计说明书
摘 要
串口通信是目前单片机和 DSP 等嵌入式系统之间,以及嵌入式系统与 PC 机或无线模块之间的一种非常重要且普遍使用的通信方式。在嵌入式系统的硬件结构中,通常只有一个8位或 16位的 CPU, 不仅要完成主流程的工作, 同时还要处理随时发生的各种中断, 因而嵌入式系统中的串口通信程序设计与 PC 机有很大的不同。
串行端口的本质功能是作为 CPU 和串行设备间的编码转换器,一般微机内都配有通信适配器,使计算机能够与其他具有RS 232 串口的计算机或设备进行通信。
本系统中目标机开发板的内核采用的是三星的 S3C2410 ,工作非常可靠,可稳定运行在 203 MHz 的时钟频率下。其外设非常丰富,功能强大,完全可以满足设计需要。串口线采用常用的 RS 232 型接口模式,能实现计算机与开发板间的数据传输与控制。 关键词：ARM；串口通信；串行端口；RS 232
II
山东建筑大学信电学院课程设计说明书
设计目的
以嵌入式芯片S3C2410为核心的最小嵌入式系统构建方法，给出了S3C2410的复位电路、电源电路、存储器电路和串口电路等硬件组成。在ADS环境下自制的最小Boobt loader程序开发并调试。
2 设计要求
串口通信是嵌入式设备必备的通信方式之一，选用ARM芯片和电平转换芯片完成出口通信的设计，并设计完整物理接口。
根据设计题目的要求，选择确定ARM芯片型号、电平转换芯片型号，完成系统硬件设计和程序设计。
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山东建筑大学信电学院课程设计说明书
3 设计内容
3.1 S3C2410与串口通信概述
3.1.1S3C2410处理器概述
S3C2410是Samsung公司基于A RM 920T内核的嵌入式微处理器.本文以S3C2410为核心，配置了最基本外围电路构成了最小的嵌入式系统，并在ADS上开发了启动程序，完成硬件初始化，配置运行环境，串日调试功能。
Samsung 公司推出的16/32位RISC处理器S3C2410A，为手持设备和一般类型应用提 供了低价格、低功耗、高性能小型微控制器的解决方案。为了降低整个系统的成本， S3C2410A提供了以下丰富的内部设备：分开的16KB的指令Cache和16KB数据Cache， MMU虚拟存储器管理，LCD控制器（支持STN&TFT），支持NAND Flash系统引导，系统 管理器（片选逻辑和SDRAM控制器），3通道UART，4通道DMA，4通道PWM定时器，I/O 端口，RTC，8通道10位ADC和触摸屏接口，IIC-BUS接口，IIC-BUS接口，USB主机，USB 设备，SD主卡&MMC卡接口，2通道的SPI以及内部PLL时钟倍频器。
S3C2410A采用了ARM920T内核，0.18um工艺的CMOS标准宏单元和存储器单元。 它的低功耗、精简和出色的全静态设计特别适用于对成本和功耗敏感的应用。同样它还采用 一种叫做Advanced Microcontroller Bus Architecture(AMBA)新型总线结构。
S3C2410A的显著特性是它的CPU核心，是一个由Advanced RISC Machines（ARM） 有限公司设计的16/32位ARM920T RISC处理器。ARM920T实现了MMU，AMBA BUS和 Harvard高速缓冲体系结构。这一结构具有独立的16KB指令Cache和16KB数据Cache，每 个都是由8字长的行（line）构成。
通过提供一系列完整的系统外围设备，S3C2410A大大减少了整个系统的成本，消除了 为系统配置额外器件的需要。本文档将介绍S3C2410A中集成的以下片上功能：
● 1.8V/2.0V内核供电，3.3V存储器供电，3.3V外部I/O供电； ● 具备16KB的I-Cache和16KB的D-Cache/MMU； ● 外部存储控制器（SDRAM 控制和片选逻辑）
● LCD 控制器（?大支持 4K 色 STN 和 256K 色 TFT）提供 1 通道 LCD 专用 DMA。
●4 通道 DMA 并有外部请求引脚。
●3 通道 UART(IrDA1.0,16 字节 Tx FIFO，和 16 字节 Rx FIFO)/2 通道 SPI
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