TUSB8041
www.ti.com
SLLSEE4C–JUNE2014–REVISEDJULY2015
8.6TimingRequirements,Power-Up
PARAMETERtd1td2tsu_iothd_io
tVDD33_RAMPtVDD_RAMP(1)(2)(3)
DESCRIPTION
VDD33stablebeforeVDDstable
(1)
MINSee
(2)
TYPMAXUNITmsmsμsμs
VDDandVDD33stablebeforede-assertionofGRSTz
SetupforMISCinputs(3)sampledatthede-assertionofGRSTzHoldforMISCinputs(3)sampledatthede-assertionofGRSTzVDD33supplyramprequirementsVDDsupplyramprequirements
30.10.10.20.2
100100
msms
AnactiveresetisrequirediftheVDD33supplyisstablebeforetheVDD11supply.ThisactiveResetshallmeetthe3mspower-updelaycountingfrombothpowersuppliesbeingstabletothede-assertionofGRSTz.
Thereisnopower-onrelationshipbetweenVDD33andVDDunlessGRSTzisonlyconnectedtoacapacitortoGND.ThenVDDmustbestableminimumof10μsbeforetheVDD33.
MISCpinssampledatde-assertionofGRSTz:FULLPWRMGMTz,GANGED,PWRCTL_POL,SMBUSz,BATEN[4:1],andAUTOENz.
td2GRSTzVDD33td1VDDtsu_ioMISC_IOthd_ioFigure2.Power-UpTimingRequirements
8.7HubInputSupplyCurrent
TypicalvaluesmeasuredatTA=25°C
PARAMETER
LOWPOWERMODESPowerOn(afterReset)UpstreamDisconnectSuspend
ACTIVEMODES(USstate/DSState)3.0host/1SSDeviceandHubinU1/U23.0host/1SSDeviceandHubinU03.0host/2SSDevicesandHubinU1/U23.0host/2SSDevicesandHubinU03.0host/3SSDevicesandHubinU1/U23.0host/3SSDevicesandHubinU03.0host/4SSDevicesandHubinU1/U23.0host/4SSDevicesandHubinU03.0host/1SSDeviceinU0and1HSDevice3.0host/2SSDevicesinU0and2HSDevices2.0host/HSDevice2.0host/4HSDevices
494949494949494985994576
2253663055083806614557783955546386
mAmAmAmAmAmAmAmAmAmAmAmA
2.32.32.5
282833
mAmAmA
VDD333.3V
VDD1.1V
UNIT
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TUSB8041
SLLSEE4C–JUNE2014–REVISEDJULY2015
www.ti.com
9DetailedDescription
9.1Overview
TheTUSB8041isafour-portUSB3.0complianthub.ItprovidessimultaneousSuperSpeedUSBandhigh-speed/full-speedconnectionsontheupstreamportandprovidesSuperSpeedUSB,high-speed,full-speed,orlow-speedconnectionsonthedownstreamports.Whentheupstreamportisconnectedtoanelectricalenvironmentthatonlysupportshigh-speedorfull-speed/low-speedconnections,SuperSpeedUSBconnectivityisdisabledonthedownstreamports.Whentheupstreamportisconnectedtoanelectricalenvironmentthatonlysupportsfull-speed/low-speedconnections,SuperSpeedUSBandhigh-speedconnectivityaredisabledonthedownstreamports.
9.2FunctionalBlockDiagram
USB_SSRXM_UPUSB_SSRXP_UPUSB_SSTXM_UPUSB_SSTXP_UPUSB_DM_UPUSB_DP_UPUSB_VBUSUSB_R1VDD33VDDVSSPowerDistributionUSB2.0HubVBUSDetectSuperSpeed HubXIXOOscilatorUSB_SSRXM_DN1USB_SSRXP_DN1USB_SSRXM_DN2USB_SSRXP_DN2USB_SSRXM_DN3USB_SSRXP_DN3USB_SSRXM_DN4USB_SSRXP_DN4USB_SSTXM_DN1USB_SSTXP_DN1USB_SSTXM_DN2USB_SSTXP_DN2USB_SSTXM_DN3USB_SSTXP_DN3USB_SSTXM_DN4USB_SSTXP_DN4USB_DM_DN1USB_DM_DN2USBDMDN4__USB_DP_DN4USB_DM_DN3USB_DP_DN3USB_DP_DN1USB_DP_DN2GRSTzClockandResetDistributionTESTGANGED/SMBA2/HS_UPFULLPWRMGMTz/SMBA1/SS_UPPWRCTL_POLSMBUSz/SS_SUSPENDAUTOENz/HS_SUSPENDSCL/SMBCLKSDA/SMBDATOVERCUR1zPWRCTL1/BATEN1OVERCUR2zPWRCTL2/BATEN2OVERCUR3zPWRCTL3/BATEN3OVERCUR4zPWRCTL4/BATEN4GPIOI2CSMBUSControlRegistersOTPROM9.3FeatureDescription
9.3.1BatteryChargingFeatures
TheTUSB8041providessupportforUSBBatteryCharging.BatterychargingsupportmaybeenabledonaperportbasisthroughtheREG_6h(batEn[3:0]).
BatterychargingsupportincludesbothChargingDownstreamPort(CDP)andDedicatedChargingPort(DCP)modes.TheDCPmodeiscompliantwiththeChineseTelecommunicationsIndustryStandardYD/T1591-2009.
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TUSB8041
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SLLSEE4C–JUNE2014–REVISEDJULY2015
FeatureDescription(continued)
Inaddition,tostandardDCPmode,theTUSB8041providesamode(AUTOMODE)whichautomaticallyprovidessupportforDCPdevicesanddevicesthatsupportcustomchargingindication.WheninAUTOMODE,theportwillautomaticallyswitchbetweenadividermodeandtheDCPmodedependingontheportabledeviceconnected.ThedividedmodeplacesafixedDCvoltageontheportsDPandDMsignalswhichallowssomedevicestoidentifythecapabilitiesofthecharger.Thedefaultdividermodeindicatessupportforupto5W.Thedividermodecanbeconfiguredtoreportahigh-currentsetting(upto10W)throughREG_Ah(HiCurAcpModeEn).
ThebatterychargingmodeforeachportisdependentonthestateofReg_6h(batEn[n]),thestatusoftheVBUSinput,andthestateofREG_Ah(autoModeEnz)upstreamportasidentifiedinTable1.
Table1.TUSB8041BatteryChargingModes
batEn[n]
01
VBUSDon’tCare<4V>4V
(1)(2)(3)(4)
autoModeEnzDon’tCare
01Don’tCare
BCModePortx(x=n+1)Don’tCareAutomode(1)
DCP(3)
(4)
(2)
CDP(3)
Auto-modeautomaticallyselectsdivider-modeorDCPmode.
Dividermodecanbeconfiguredforhigh-currentmodethroughregisterorOTPsettings.USBDeviceisUSBBatteryChargingSpecificationRevision1.2Compliant
USBDeviceisChineseTelecommunicationsIndustryStandardYD/T1591-2009
9.3.2USBPowerManagement
TheTUSB8041canbeconfiguredforpowerswitchedapplicationsusingeitherper-portorgangedpower-enablecontrolsandover-currentstatusinputs.
PowerswitchsupportisenabledbyREG_5h(fullPwrMgmtz)andtheper-portorgangedmodeisconfiguredbyREG_5h(ganged).
TheTUSB8041supportsbothactivehighandactivelowpower-enablecontrols.ThePWRCTL[4:1]polarityisconfiguredbyREG_Ah(pwrctlPol).
9.3.3OneTimeProgrammable(OTP)Configuration
TheTUSB8041allowsdeviceconfigurationthroughonetimeprogrammablenon-volatilememory(OTP).TheprogrammingoftheOTPissupportedusingvendor-definedUSBdevicerequests.FordetailsusingtheOTPfeaturespleasecontactyourTIrepresentative.
ThetablebelowprovidesalistfeatureswhichmaybeconfiguredusingtheOTP.
Table2.OTPConfigurableFeatures
CONFIGURATIONREGISTER
OFFSETREG_01hREG_02hREG_03hREG_04hREG_07h
BITFIELD[7:0][7:0][7:0][7:0][0]
VendorIDLSBVendorIDMSBProductIDLSBProductIDMSB
Portremovableconfigurationfordownstreamports1.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.
Portremovableconfigurationfordownstreamports2.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.
Portremovableconfigurationfordownstreamports3.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.
DESCRIPTION
REG_07h[1]
REG_07h[2]
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TUSB8041
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Table2.OTPConfigurableFeatures(continued)
CONFIGURATIONREGISTER
OFFSETREG_07hREG_0AhREG_0AhREG_0BhREG_0BhREG_0BhREG_0BhREG_F0h
BITFIELD
[3][3][4][0][1][2][3][3:1]
DESCRIPTION
Portremovableconfigurationfordownstreamports4.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.
EnableDeviceAttachDetection..High-currentdividermodeenable.
USB2.0portpolarityconfigurationfordownstreamports1.USB2.0portpolarityconfigurationfordownstreamports2.USB2.0portpolarityconfigurationfordownstreamports3.USB2.0portpolarityconfigurationfordownstreamports4.USBpowerswitchpower-ondelay.
9.3.4ClockGeneration
TheTUSB8041acceptsacrystalinputtodriveaninternaloscillatororanexternalclocksource.IfaclockisprovidedtoXIinsteadofacrystal,XOisleftopen.Otherwise,ifacrystalisused,theconnectionneedstofollowtheguidelinesbelow.SinceXIandXOarecoupledtootherleadsandsuppliesonthePCB,itisimportanttokeepthemasshortaspossibleandawayfromanyswitchingleads.ItisalsorecommendedtominimizethecapacitancebetweenXIandXO.ThiscanbeaccomplishedbyshieldingC1andC2withthecleangroundlines.
R11MY1XI24 MHzTUSB8041CLOCKXOCL1CL2Figure3.TUSB8041Clock
9.3.5CrystalRequirements
Thecrystalmustbefundamentalmodewithloadcapacitanceof12pF-24pFandfrequencystabilityratingof±100PPMorbetter.Toensureproperstartuposcillationcondition,amaximumcrystalequivalentseriesresistance(ESR)of50Ωisrecommended.Aparallelloadcapacitorshouldbeusedifacrystalsourceisused.Theexactloadcapacitancevalueuseddependsonthecrystalvendor.RefertoapplicationnoteSelectionandSpecificationforCrystalsforTexasInstrumentsUSB2.0devices(SLLA122)fordetailsonhowtodeterminetheloadcapacitancevalue.
9.3.6InputClockRequirements
Whenusinganexternalclocksourcesuchasanoscillator,thereferenceclockshouldhavea±100PPMorbetterfrequencystabilityandhavelessthan50-psabsolutepeaktopeakjitterorlessthan25-pspeaktopeakjitterafterapplyingtheUSB3.0jittertransferfunction.XIshouldbetiedtothe1.8-VclocksourceandXOshouldbeleftfloating.
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TUSB8041
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9.3.7Power-UpandReset
TheTUSB8041doesnothavespecificpowersequencingrequirementswithrespecttothecorepower(VDD)orI/Oandanalogpower(VDD33).Thecorepower(VDD)orI/Opower(VDD33)maybepoweredupforanindefiniteperiodoftimewhiletheotherisnotpoweredupifalloftheseconstraintsaremet:?Allmaximumratingsandrecommendedoperatingconditionsareobserved.
?Allwarningsaboutexposuretomaximumratedandrecommendedconditionsareobserved,particularlyjunctiontemperature.Theseapplytopowertransitionsaswellasnormaloperation.
?BuscontentionwhileVDD33ispoweredupmustbelimitedto100hoursovertheprojectedlife-timeofthedevice.
?BuscontentionwhileVDD33ispowereddownmayviolatetheabsolutemaximumratings.
Asupplybusispoweredupwhenthevoltageiswithintherecommendedoperatingrange.Itispowereddownwhenitisbelowthatrange,eitherstableorintransition.
Aminimumresetdurationof3msisrequired.Thisisdefinedasthetimewhenthepowersuppliesareintherecommendedoperatingrangetothede-assertionofGRSTz.Thiscanbegeneratedusingprogrammable-delaysupervisorydeviceorusinganRCcircuit.
9.4DeviceFunctionalModes
9.4.1ExternalConfigurationInterface
TheTUSB8041supportsaserialinterfaceforconfigurationregisteraccess.ThedevicemaybeconfiguredbyanattachedI2CEEPROMoraccessedasaslavebyanSMBuscapablehostcontroller.TheexternalinterfaceisenabledwhenboththeSCL/SMBCLKandSDA/SMBDATpinsarepulledupto3.3Vatthede-assertionofreset.Themode,I2CmasterorSMBusslave,isdeterminedbythestateofSMBUSz/SS_SUSPENDpinatreset.9.4.2I2CEEPROMOperation
TheTUSB8041supportsasingle-master,standardmode(100kbit/s)connectiontoadedicatedI2CEEPROMwhentheI2Cinterfacemodeisenabled.InI2Cmode,theTUSB8041readsthecontentsoftheEEPROMatbusaddress1010000busing7-bitaddressingstartingataddress0.
IfthevalueoftheEEPROMcontentsatbyte00hequals55h,theTUSB8041loadstheconfigurationregistersaccordingtotheEEPROMmap.Ifthefirstbyteisnot55h,theTUSB8041exitstheI2Cmodeandcontinuesexecutionwiththedefaultvaluesintheconfigurationregisters.Thehubwillnotconnectontheupstreamportuntiltheconfigurationiscompleted.Ifthehubdetectedanun-programmedEEPROM(valueotherthan55h),thehubwillenterProgrammingModeandaProgrammingEndpointwithinthehubwillbeenabled.
Note,thebyteslocatedaboveoffsetAhareoptional.TherequirementfordatainthoseaddressesisdependentontheoptionsconfiguredintheDeviceConfiguration,andDeviceConfiguration2registers.FordetailsonI2CoperationrefertotheUM10204I2C-busSpecificationandUserManual.9.4.3SMBusSlaveOperation
WhentheSMBusinterfacemodeisenabled,theTUSB8041supportsreadblockandwriteblockprotocolsasaslave-onlySMBusdevice.
TheTUSB8041slaveaddressis10001xyz,where:
?xisthestateofGANGED/SMBA2/HS_UPpinatreset,
?yisthestateofFULLPWRMGMTz/SMBA1/SS_UPpinatreset,and?zistheread/writebit;1=readaccess,0=writeaccess.
IftheTUSB8041isaddressedbyahostusinganunsupportedprotocolitwillnotrespond.TheTUSB8041willwaitindefinitelyforconfigurationbytheSMBushostandwillnotconnectontheupstreamportuntiltheSMBushostindicatesconfigurationiscompletebyclearingtheCFG_ACTIVEbit.
FordetailsonSMBusrequirementsrefertotheSystemManagementBusSpecification.
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