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9.5.21ProductStringRegisters
Table42.RegisterOffset90h-CFh
BitNo.ResetState
70
60
50
40
30
20
10
00
Table43.BitDescriptions–ProductStringByteNRegister
Bit
FieldName
Access
Description
ProductstringbyteN.Theseregistersprovidethestringvaluesreturnedforstringindex2whenprodStringLenisgreaterthan0.ThenumberofbytesreturnedinthestringisequaltoprodStringLen.
TheprogrammeddatashouldbeinUNICODEUTF-16LEencodingsasdefinedbyTheUnicodeStandard,WorldwideCharacterEncoding,Version5.0.
7:0prodStringByte[n]RO/RW
9.5.22AdditionalFeatureConfigurationRegister
Table44.RegisterOffsetF0h
BitNo.ResetState
70
60
50
40
30
20
10
00
Table45.BitDescriptions–AdditionalFeatureConfigurationRegister
Bit7:54
FieldNameRSVDstsOutputEn
AccessRORO/RW
Description
Reserved.Readonly,returns0whenread.
Statusoutputenable.ThisbitenablestheHS,HS_SUSPEND,SS,andSS_SUSPENDoutputs..
0=HS,HS_SUSPEND,SS,andSS_SUSPENDoutputsaredisabledandtri-stated.
1=HS,HS_SUSPEND,SS,andSS_SUSPENDoutputsareenabled.
Thisfieldmaybeover-writtenbyEEPROMcontentsorbyanSMBusHost.
3:1
pwronTime
RW
PowerOnDelayTime.WhenOTPROMpwronTimefieldisallzero,thisfieldsetsthedelaytimefromtheremovaldisableofPWRCTLtotheenableofPWRCTLwhentransitioningbatterychargingmodes.Forexample,whendisablingthepoweronatransitionfromacustom
chargingmodetoDedicatedChargingPortMode.Thenominaltimingisdefinedasfollows:
TPWRON_EN=(pwronTime+1)x200ms
Thisfieldmaybeover-writtenbyEEPROMcontentsorbyanSMBushost.
(1)
USB3SpreadSpectrumDisable.ThisbitallowsfirmwaretodisablethespreadspectrumfunctionoftheUSB3phyPLL.
0
usb3spreadDis
RW
0=Spreadspectrumfunctionisenabled1=Spreadspectrumfunctionisdisabled
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9.5.23DeviceStatusandCommandRegister
Table46.RegisterOffsetF8h
BitNo.ResetState
70
60
50
40
30
20
10
00
Table47.BitDescriptions–DeviceStatusandCommandRegister
Bit7:21
FieldNameRSVDsmbusRst
AccessRORSU
Description
Reserved.Readonly,returns0whenread.
SMBusinterfacereset.ThisbitloadstheregistersbacktotheirGRSTzvalues.
Thisbitissetbywritinga1andisclearedbyhardwareoncompletionofthereset.Awriteof0hasnoeffect.
Configurationactive.ThisbitindicatesthatconfigurationoftheTUSB8041iscurrentlyactive.Thebitissetbyhardwarewhenthe
deviceenterstheI2CorSMBusmode.TheTUSB8041shallnotconnectontheupstreamportwhilethisbitis1.
WhenintheSMBusmode,thisbitmustbeclearedbytheSMBushostinordertoexittheconfigurationmodeandallowtheupstreamporttoconnect.
Thebitisclearedbyawriting1.Awriteof0hasnoeffect.
0cfgActiveRCU
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10ApplicationsandImplementation
10.1ApplicationInformation
TheTUSB8041isafour-portUSB3.0complianthub.ItprovidessimultaneousSuperSpeedUSBandhigh-speed/full-speedconnectionsontheupstreamportandprovidesSuperSpeedUSB,high-speed,full-speed,orlowspeedconnectionsonthedownstreamport.TheTUSB8041canbeusedinanyapplicationthatneedsadditionalUSBcompliantports.Forexample,aspecificnotebookmayonlyhavetwodownstreamUSBports.ByusingtheTUSB8041,thenotebookcanincreasethedownstreamportcounttofive.
10.2TypicalApplication
10.2.1DiscreteUSBHubProduct
AcommonapplicationfortheTUSB8041isasaselfpoweredstandaloneUSBhubproduct.Theproductispoweredbyanexternal5VDCPoweradapter.Inthisapplication,usingaUSBcableTUSB8041’supstreamportispluggedintoaUSBHostcontroller.ThedownstreamportsoftheTUSB8041areexposedtousersforconnectingUSBharddrives,cameras,flashdrives,andsoforth.
DCPWRUSBTypeBConnectorUSPortTUSB8041USBPWRSWITCHUSBPWRSWITCHDSPort1USBTypeAConnectorDSPort2USB Type AConnectorDSPort3USBTypeAConnectorDSPort4USBTypeAConnectorFigure4.DiscreteUSBHubProduct
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TypicalApplication(continued)
10.2.1.1DesignRequirements
Table48.DesignParameters
DESIGNPARAMETER
VDDSupplyVDD33Supply
UpstreamPortUSBSupport(SS,HS,FS)DownstreamPort1USBSupport(SS,HS,FS,LS)DownstreamPort2USBSupport(SS,HS,FS,LS)DownstreamPort3USBSupport(SS,HS,FS,LS)DownstreamPort4USBSupport(SS,HS,FS,LS)
NumberofRemovableDownstreamPortsNumberofNon-RemovableDownstreamPortsFullPowerManagementofDownstreamPortsIndividualControlofDownstreamPortPowerSwitch
PowerSwitchEnablePolarity
BatteryChargeSupportforDownstreamPort1BatteryChargeSupportforDownstreamPort2BatteryChargeSupportforDownstreamPort3BatteryChargeSupportforDownstreamPort4
I2CEEPROMSupport24MHzClockSource
EXAMPLEVALUE
1.1V3.3VSS,HS,FSSS,HS,FS,LSSS,HS,FS,LSSS,HS,FS,LSSS,HS,FS,LS
40
Yes.(FULLPWRMGMTZ=0)
Yes.(GANGED=0)ActiveHigh.(PWRCTL_POL=0)
YesYesYesYesNo.Crystal
10.2.1.2DetailedDesignProcedure
10.2.1.2.1UpstreamPortImplementation
TheupstreamoftheTUSB8041isconnectedtoaUSB3TypeBconnector.ThisparticularexamplehasGANGEDpinandFULLPWRMGMTZpinpulledlowwhichresultsinindividualpowersupporteachdownstreamport.TheVBUSsignalfromtheUSB3TypeBconnectorisfeedthroughavoltagedivider.ThepurposeofthevoltagedivideristomakesurethelevelmeetsUSB_VBUSinputrequirements
R1C110uFJ1VBUSDMDPGNDSSTXNSSTXPGNDSSRXNSSRXPSHIELD0SHIELD11234567891011VBUSUSB_DM_UPUSB_DP_UPCAP_UP_TXMCAP_UP_TXPC2C30.1uF02010.1uF0201USB_SSTXM_UPUSB_SSTXP_UPUSB_SSRXM_UPUSB_SSRXP_UP54535655595804021?.9KR210K1021HU1AUSB_VBUSUSB_DM_UPUSB_DP_UPUSB_SSTXM_UPUSB_SSTXP_UPUSB_SSRXM_UPUSB_SSRXP_UPTUSB8041C40.1uFC50.001uFR51M04025%GANGED/SMBA2/HS_UPFULLPWRMGMTZ/SMBA1/SS_UP4240R34.7K04025%R44.7K04025%USB3_TYPEB_CONNECTORFigure5.UpstreamPortImplementation
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10.2.1.2.2DownstreamPort1Implementation
Thedownstreamport1oftheTUSB8041isconnectedtoaUSB3TypeAconnector.WithBATEN1pinpulledup,BatteryChargesupportisenabledforPort1.IfBatteryChargesupportisnotneeded,thenpull-upresistoronBATEN1shouldbeuninstalled.
BOARD_3P3VPOPULATEFOR BC SUPPORTR64.7K04025?1DN1_VBUSDN1_VBUS220 @ 100MHZC60.1uF1234567891011VBUS_DS1J2VBUSDMDPGNDSSRXNSSRXPGNDSSTXNSSTXPSHIELD0SHIELD1U1BUSB_DM_DN1USB_DP_DN1USB_SSRXM_DN1USB_SSRXP_DN1USB_SSTXM_DN1USB_SSTXP_DN1PWRCTL1/BATEN1OVERCUR1TUSB80412176433646USB_DM_DN1USB_DP_DN1USB_SSRXM_DN1USB_SSRXP_DN10.1uF0201USB_SSTXM_DN1USB_SSTXP_DN10.1uF0201PWRCTRL1_BATEN1OVERCUR1ZR71M04025é0.001uFC100.1uFC8C7CAP_DN_TXM1CAP_DN_TXP1USB3_TYPEA_CONNECTORFigure6.DownstreamPort1Implementation
10.2.1.2.3DownstreamPort2Implementation
Thedownstreamport2oftheTUSB8041isconnectedtoaUSB3TypeAconnector.WithBATEN2pinpulledup,BatteryChargesupportisenabledforPort2.IfBatteryChargesupportisnotneeded,thenpull-upresistoronBATEN2shouldbeuninstalled.
BOARD_3P3VFB2POPULATEFOR BC SUPPORTR84.7K04025%DN2_VBUSDN2_VBUS220 @ 100MHZC110.1uFJ3U1CUSB_DM_DN2USB_DP_DN2USB_SSRXM_DN2USB_SSRXP_DN2USB_SSTXM_DN2USB_SSTXP_DN2PWRCTL2/BATEN2OVERCUR2TUSB8041109151412113547USB_DM_DN2USB_DP_DN2USB_SSRXM_DN2USB_SSRXP_DN2USB_SSTXM_DN2USB_SSTXP_DN2C13C120.1uF02010.1uF0201CAP_DN2_TXMCAP_DN2_TXP1234567891011VBUSDMDPGNDSSRXNSSRXPGNDSSTXNSSTXPSHIELD0SHIELD1VBUS_DS2PWRCTRL2_BATEN2OVERCUR2ZR91M04025á50.001uFC140.1uFUSB3_TYPEA_CONNECTORFigure7.DownstreamPort2Implementation
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