TAMPER_2) Alternate Function mapping */
#define GPIO_AF_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
#define GPIO_AF_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ /**
* @brief AF 1 selection */
#define GPIO_AF_TIM1 #define GPIO_AF_TIM2 /**
* @brief AF 2 selection */
#define GPIO_AF_TIM3 #define GPIO_AF_TIM4 #define GPIO_AF_TIM5 /**
* @brief AF 3 selection */
#define GPIO_AF_TIM8 #define GPIO_AF_TIM9 #define GPIO_AF_TIM10 #define GPIO_AF_TIM11 /**
* @brief AF 4 selection */
#define GPIO_AF_I2C1 #define GPIO_AF_I2C2 #define GPIO_AF_I2C3 /**
* @brief AF 5 selection */
#define GPIO_AF_SPI1 #define GPIO_AF_SPI2 */ /**
* @brief AF 6 selection */
((uint8_t)0x01) /* TIM1 Alternate Function mapping */ ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ ((uint8_t)0x03) /* TIM9 Alternate Function mapping */ ((uint8_t)0x03) /* TIM10 Alternate Function mapping */ ((uint8_t)0x03) /* TIM11 Alternate Function mapping */ ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping 6
#define GPIO_AF_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */ /**
* @brief AF 7 selection */
#define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
#define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
#define GPIO_AF_USART3 */
#define GPIO_AF_I2S3ext /**
* @brief AF 8 selection */
#define GPIO_AF_UART4 #define GPIO_AF_UART5 #define GPIO_AF_USART6 */ /**
* @brief AF 9 selection */
#define GPIO_AF_CAN1 #define GPIO_AF_CAN2 #define GPIO_AF_TIM12 #define GPIO_AF_TIM13 #define GPIO_AF_TIM14 /**
* @brief AF 10 selection */
#define GPIO_AF_OTG_FS */
#define GPIO_AF_OTG_HS */ /**
* @brief AF 11 selection */
#define GPIO_AF_ETH mapping */
((uint8_t)0x07) /* USART3 Alternate Function mapping ((uint8_t)0x07) /* I2S3ext Alternate Function mapping */ ((uint8_t)0x08) /* UART4 Alternate Function mapping */ ((uint8_t)0x08) /* UART5 Alternate Function mapping */ ((uint8_t)0x08) /* USART6 Alternate Function mapping ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ ((uint8_t)0x09) /* CAN2 Alternate Function mapping */ ((uint8_t)0x09) /* TIM12 Alternate Function mapping */ ((uint8_t)0x09) /* TIM13 Alternate Function mapping */ ((uint8_t)0x09) /* TIM14 Alternate Function mapping */ ((uint8_t)0xA) /* OTG_FS Alternate Function mapping ((uint8_t)0xA) /* OTG_HS Alternate Function mapping ((uint8_t)0x0B) /* ETHERNET Alternate Function 7
/**
* @brief AF 12 selection */
#define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */
#define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */
#define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */ /**
* @brief AF 13 selection */
#define GPIO_AF_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */ /**
* @brief AF 15 selection */
#define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \\
((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \\
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \\
((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \\
((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \\
((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \\
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \\
((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \\
((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \\
((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \\
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \\
((AF) == GPIO_AF_USART3) || ((AF) ==
8
GPIO_AF_UART4) || \\
((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \\
((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \\
((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \\
((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_FSMC) || \\
((AF) == GPIO_AF_OTG_HS_FS) || ((AF) == GPIO_AF_SDIO) || \\
((AF) == GPIO_AF_DCMI) || ((AF) == GPIO_AF_EVENTOUT)) /** * @} */
/** @defgroup GPIO_Legacy * @{ */
#define GPIO_Mode_AIN GPIO_Mode_AN
#define GPIO_AF_OTG1_FS GPIO_AF_OTG_FS #define GPIO_AF_OTG2_HS GPIO_AF_OTG_HS #define GPIO_AF_OTG2_FS GPIO_AF_OTG_HS_FS /** * @} */ /** * @} */
/* Exported macro ------------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/* Function used to set the GPIO configuration to the default reset state ****/ void GPIO_DeInit(GPIO_TypeDef* GPIOx);
/* Initialization and Configuration functions *********************************/ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
9
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
/* GPIO Read and Write functions **********************************************/ uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
/* GPIO Alternate functions configuration function ****************************/
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF);
#ifdef __cplusplus }
#endif
#endif /*__STM32F4xx_GPIO_H */ /** * @} */ /** * @} */
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
typedef struct {
__IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
__IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */
__IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08
10
*/
__IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */
__IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */
__IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */
__IO uint16_t BSRRL; /*!< GPIO port bit set/reset low register, Address offset: 0x18 */
__IO uint16_t BSRRH; */
__IO uint32_t LCKR; */
__IO uint32_t AFR[2]; 0x20-0x24 */ } GPIO_TypeDef;
/*!< GPIO port bit set/reset high register, Address offset: 0x1A /*!< GPIO port configuration lock register, Address offset: 0x1C /*!< GPIO alternate function registers, Address offset: 11