ug909 - partial - config - christine(5)

ICAP is the internal configuration access port. It behaves identically to the slave SelectMAP interface with the exception that SelectMAP has a bi-directional data port while ICAP has dedicated data inputs and outputs. To use ICAP, do not set PERSIST during the bitstream generation process.

术语

configuration

A configuration是一个完整的设计，每个RP分区都有相应的RM模块。在一个Partial Reconfiguration FPGA Project中有很多配置。每个配置都会产生一个full文件加上为每个RM模块产生的partial比特文件。

Configuration Frame

FPGA配置存储器空间最小的可寻址的单元。可重构帧建立在这些底层的离散的单元上。

checkpoint

包含网表，约束和实现中的任何布局布线的数据信息。

eg: The synth_design command synthesizes the design and stores the results in memory. In order to write the results out to a file, use: write_checkpoint .dcp

cell partition

设计的一个逻辑分区。 partition pins

静态逻辑与可重配置逻辑之间的逻辑和物理连接。是自动为可重配置端口创建的。白色的矩形就是。可以是输入，也可以是输出，不可以是双向，除非连接到顶层。

Proxy Logic

RESET_AFTER_RECONFIG

design.tcl文件内容

set tclParams [list hd.visual 1]

#Define location for \set tclHome \if {[file exists $tclHome]} { set tclDir $tclHome

} elseif {[file exists \ set tclDir \} else {

error \valid location.\}

############################################################### ### Define Part, Package, Speedgrade

############################################################### set device \set package \set speed \

set part $device$package$speed

############################################################### ### Setup Variables

###############################################################

####flow control

set run.topSynth 1 set run.rmSynth 1 set run.prImpl 1 set run.prVerify 1 set run.writeBitstream 1

####Report and DCP controls - values: 0-required min; 1-few extra; 2-all set verbose 1 set dcpLevel 1

####Output Directories set synthDir \

set implDir \set dcpDir \set bitDir \

####Input Directories

set srcDir \set rtlDir \set prjDir \set xdcDir \set coreDir \set netlistDir \

####Source required Tcl Procs source $tclDir/design_utils.tcl source $tclDir/synth_utils.tcl source $tclDir/impl_utils.tcl

source $tclDir/hd_floorplan_utils.tcl

############################################################### ### Top Definition

############################################################### set top \set static \add_module $static

set_attribute module $static moduleName $top set_attribute module $static top_level 1

set_attribute module $static vlog [list [glob $rtlDir/$top/*.v]] set_attribute module $static synth ${run.topSynth}

#################################################################### ### RP Module Definitions

#################################################################### set module1 \

set module1_variant1 \set variant $module1_variant1 add_module $variant

set_attribute module $variant moduleName $module1

set_attribute module $variant vlog [list $rtlDir/$variant/$variant.v] set_attribute module $variant synth ${run.rmSynth}

set module1_variant2 \set variant $module1_variant2 add_module $variant

set_attribute module $variant moduleName $module1

set_attribute module $variant vlog [list $rtlDir/$variant/$variant.v] set_attribute module $variant synth ${run.rmSynth}

set module1_inst \

#################################################################### ### RP Module Definitions

#################################################################### set module2 \

set module2_variant1 \set variant $module2_variant1 add_module $variant

set_attribute module $variant moduleName $module2

set_attribute module $variant vlog [list $rtlDir/$variant/$variant.v] set_attribute module $variant synth ${run.rmSynth}

set module2_variant2 \set variant $module2_variant2 add_module $variant

set_attribute module $variant moduleName $module2

set_attribute module $variant vlog [list $rtlDir/$variant/$variant.v] set_attribute module $variant synth ${run.rmSynth}

set module2_inst \

######################################################################## ### Configuration (Implementation) Definition - Replicate for each Config

######################################################################## set config \

add_config $config

set_attribute config $config top $top

set_attribute config $config implXDC [list $xdcDir/${top}.xdc] set_attribute config $config impl ${run.prImpl}

set_attribute config $config settings [list [list $static $top implement] \\

[list $module1_variant1 $module1_inst implement] \\

[list $module2_variant1 $module2_inst implement] \\

] set_attribute config $config verify ${run.prVerify} set_attribute config $config bitstream ${run.writeBitstream}

######################################################################## ### Configuration (Implementation) Definition - Replicate for each Config

######################################################################## set config \

add_config $config

set_attribute config $config top $top

set_attribute config $config implXDC [list $xdcDir/${top}.xdc] set_attribute config $config impl ${run.prImpl}

set_attribute config $config settings [list [list $static $top import] \\

[list $module1_variant2 $module1_inst implement] \\

[list $module2_variant2 $module2_inst implement] \\

] set_attribute config $config verify ${run.prVerify} set_attribute config $config bitstream ${run.writeBitstream}

######################################################################## ### Task / flow portion

######################################################################## # Build the designs source $tclDir/run.tcl exit

效果是：

下载full文件后，LED灯执行两个任务。四盏灯在递增，另外四盏灯在向右移动闪烁。

1.

下载Config_LeftDown_pblock_inst_shift_partial.bit,

向右移动闪烁的四盏灯改变了方向，但是自增闪烁的四盏灯没有变，不受reconfig的影响。 2.

下载

Config_LeftDown_pblock_inst_count_partial.bit, then

此时递增计数闪烁的四盏灯变为递减计数闪烁了，但是移动闪烁的灯不受reconfig的影响。

另外一个例子：

synth_design -flatten_hierarchy rebuilt -top top -part xc7z020

synth_design -mode out_of_context -flatten_hierarchy rebuilt -top shift -part xc7z020

synth_design -mode out_of_context -flatten_hierarchy rebuilt -top count -part xc7z020

Xapp290:

使用FPGA_Editor做小小的改变 更改I/O标准