if(ma=\ beep<=clk1k; end if;
if(ma=\ beep<=clk2hz; end if;
if(ma=\ beep<=clk2hz; end if;
end process; end behave;
7模式选择
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
entity keymode is port(
key:in std_logic;
key_out:OUT STD_LOGIC_vector(1 downto 0) );
end entity keymode;
ARCHITECTURE behave OF keymode IS signal count:std_logic_vector(1 downto 0):=\begin
process(key) begin
if key'event and key='0' then if key='0' then
if count=\ else count<=count+\ end if; end if; end if; end process; key_out<=count;
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8秒表
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL; entity ms is
port(clk:in std_logic;
m0:out std_logic_vector(3 downto 0); m1:out std_logic_vector(3 downto 0); m2:out std_logic_vector(3 downto 0); m3:out std_logic_vector(3 downto 0); m4:out std_logic_vector(3 downto 0); m5:out std_logic_vector(3 downto 0); m6:out std_logic_vector(3 downto 0); key:in std_logic
); end entity ms;
ARCHITECTURE miaobiao OF ms IS
signal count1: std_logic_vector(3 downto 0):=\signal count2: std_logic_vector(3 downto 0):=\signal count3: std_logic_vector(3 downto 0):=\signal count4: std_logic_vector(3 downto 0):=\signal count5: std_logic_vector(3 downto 0):=\signal count6: std_logic_vector(3 downto 0):=\signal count7: std_logic_vector(3 downto 0):=\signal en : std_logic_vector(1 downto 0) ; signal en1 : integer range 0 to 1:=0; signal en2 : integer range 0 to 1:=0; signal en3 : integer range 0 to 1:=0; signal en4 : integer range 0 to 1:=0; signal en5 : integer range 0 to 1:=0;
signal cin1:std_logic; signal cin2:std_logic; signal cin3:std_logic; signal cin4:std_logic; signal cin5:std_logic; signal cin6:std_logic;
begin
process(clk,key) begin
if clk'event and clk='1' then
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if key='0' then
if en=\ else
en<=en+\ end if; end if;
if en=\
if count1=\
count1<=\
else count1<=count1+\ end if; end if; if en=\
count1<=count1; end if;
if en=\
count1<=\ en1<=1; else en1<=0; end if; end if; end process;
process(cin1,en1) begin
if cin1'event and cin1='1' then
if count2=\ else count2<=count2+\ end if; end if;
if en1=1 then count2<=\ en2<=1; else en2<=0; end if; end process;
process(cin2,en2) begin
if cin2'event and cin2='1' then
if count3=\ else count3<=count3+\
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end if; end if;
if en2=1 then count3<=\ en3<=1; else en3<=0; end if; end process;
process(cin3,en3) begin
if cin3'event and cin3='1' then
if count4=\ else count4<=count4+\ end if; end if;
if en3=1 then count4<=\ en4<=1; else en4<=0; end if; end process;
process(cin4,en4) begin
if cin4'event and cin4='1' then
if count5=\ else count5<=count5+\ end if; end if;
if en4=1 then count5<=\ en5<=1; else en5<=0; end if; end process;
process(cin5,en5) begin
if cin5'event and cin5='1' then
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if count6=\ else count6<=count6+\ end if; end if;
if en5=1 then count6<=\ end if; end process;
process(cin6) begin
if cin6'event and cin6='1' then
if count7=\ else count7<=count7+\ end if; end if;
end process;
m0<=count1; m1<=count2; m2<=count3; m3<=count4; m4<=count5; m5<=count6; m6<=count7; end miaobiao;
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