Verilog实现智能电梯控制器(6)

2019-03-22 18:56

带液晶显示驱动的智能电梯控制器

&FLOOR6)

NextState=DOWN; else if(up_all>0) begin

if(((up_all&FLOOR1)

NextState=DOWN; else if((up_all&pos)>0)

NextState=OPENDOOR; else

NextState=UP;// end

else if(request_all||down_all) NextState=UP; else

NextState=WAIT;// end //请参考WAIT模式的注释 else

begin

if(request_all>0) begin

if((request_all&pos)>0)

NextState=OPENDOOR; else if(request_all>pos) NextState=UP; else

NextState=DOWN; end

else if((up_all&pos)||(down_all&pos)) begin

NextState=OPENDOOR; end

else if((up_all>pos)||(down_all>pos)) NextState=UP; else if(up_all||down_all)

NextState=DOWN; else

begin

NextState=WAIT;

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带液晶显示驱动的智能电梯控制器

end

end

end default:

NextState=WAIT;

endcase //3rd StateShift always block,the sequential FSM output,有限状态机第三段 always @(posedge real_clk or posedge reset)//output if(reset) //复位后初始化当前楼层为第一层,门是关闭的,电梯是静止的 begin

pos<=FLOOR1;

DoorFlag<=CLOSED; UpDnFlag<=STATIC; end

else begin

PosOut<=pos;//PosOut的输出慢pos一个时钟周期 case(NextState) WAIT: //状态为WAIT时,楼层不变,门是关闭的,电梯是静止的,其他模式的情况请大家自己推导

begin

pos<=pos;

DoorFlag<=CLOSED; UpDnFlag<=STATIC; end UP:

begin

pos<=pos<<1;

DoorFlag<=CLOSED; UpDnFlag<=UPFLAG; end DOWN: begin

pos<=pos>>1;

DoorFlag<=CLOSED; UpDnFlag<=DNFLAG; end UPSTOP:

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带液晶显示驱动的智能电梯控制器

begin

pos<=pos;

DoorFlag<=CLOSED; UpDnFlag<=UPFLAG; end

DOWNSTOP: begin

pos<=pos;

DoorFlag<=CLOSED; UpDnFlag<=DNFLAG; end

OPENDOOR: begin

pos<=pos;

DoorFlag<=OPEN; UpDnFlag<=UpDnFlag; end

CLOSEDOOR: begin

pos<=pos;

DoorFlag<=CLOSED; UpDnFlag<=UpDnFlag; end default: //默认情况 begin

pos<=FLOOR1;

DoorFlag<=CLOSED; UpDnFlag<=STATIC; end endcase end endmodule

5.3 数码管译码模块

module display_decode(cp_50M,in,out,over_alarm); input [5:0]in; input cp_50M;

output [6:0]out; output over_alarm; reg [6:0]out;

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带液晶显示驱动的智能电梯控制器

reg over_alarm;

always@(posedge cp_50M) begin case(in)

6'b000000:out<=7'b100_0000;//0 6'b000001:out<=7'b111_1001;//1 6'b000010:out<=7'b010_0100;//2 6'b000100:out<=7'b011_0000;//3 6'b001000:out<=7'b001_1001;//4 6'b010000:out<=7'b001_0010;//5 6'b100000:out<=7'b000_0010;//6 default:over_alarm<=1; endcase end endmodule

5.4 数码管时间译码模块

module display_decode_count(cp_50M,in,count_out); input [2:0]in; input cp_50M;

output [6:0] count_out;

reg [6:0] count_out;

always@(posedge cp_50M) begin case(in)

3'b000:count_out<=7'b100_0000;//0 3'b001:count_out<=7'b111_1001;//1 3'b010:count_out<=7'b010_0100;//2 3'b011:count_out<=7'b011_0000;//3 3'b100:count_out<=7'b001_1001;//4 3'b101:count_out<=7'b001_0010;//5 3'b110:count_out<=7'b000_0010;//6 default: ; endcase end endmodule

note:由于以上两个模块都比较的简单,故不作详细的注释,而且我在前面也提到了设计思想,应该不是很难理解。

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带液晶显示驱动的智能电梯控制器

5.5 LCD仲裁器

module

arbitrator(elevator_state,count_in,open_enable,stop_enable,up_enable,down_enable,close_enable);

input [6:0]elevator_state;//电梯状态 input [2:0]count_in;//计数器输出

output open_enable,stop_enable,up_enable,down_enable,close_enable;//输出LCD驱动命令信号

assign open_enable=(count_in!=0);//当这在计数时,电梯应该是开门的 assign close_enable=(elevator_state==7'b1000000);//电梯关门 assign

stop_enable=((elevator_state==7'b0000001)||(elevator_state==7'b0001000)||(elevator_state==7'b0010000));//只要满足一种情况电梯都应是处于停止等待状态 assign up_enable=(elevator_state==7'b0000010); //上升 assign down_enable=(elevator_state==7'b0000100);//下降

endmodule

5.6 LCD驱动模块

module DE2_Default ( //////////////////// Clock Input //////////////////// open_enable,stop_enable,up_enable,down_enable,close_enable, CLOCK_50, // 50 MHz KEY, //////////////////// LCD Module 16X2 //////////////// LCD_ON, // LCD Power ON/OFF LCD_BLON, // LCD Back Light ON/OFF LCD_RW, // LCD Read/Write Select, 0 = Write, 1 = Read LCD_EN, // LCD Enable LCD_RS, // LCD Command/Data Select, 0 = Command, 1 = Data LCD_DATA // LCD Data bus 8 bits

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