(MBD_DM6437_FPGA_en)DaVinci_lab5_speedway_f08_10_1_3_3(10)

8. Save the model as ‘sad_fpga_coprocessor.mdl’.

9. Close the model, and re-open it anew. As the model opens, note the text line at the

MATLAB console:

[DaVinci Processor] Successfully generated VLYNQ memory map to ‘vlynq_mmap’ workspace variable.

This confirms that all memory-mapping information for shared memory in the model is exported to the MATLAB workspace variable ‘vlynq_mmap’.

We are now ready for automatic code generation of the FPGA co-processor, as illustrated below.

Figure 11 -- Automatic Code Generation of the FPGA Co-Processor