(MBD_DM6437_FPGA_en)DaVinci_lab5_speedway_f08_10_1_3_3(13)

2021-04-06 08:28

Figure 13 – Open ISE project

This ISE project has been augmented from a baseline reference design called 'FPGA Co-Processing Design' that ships with the Avnet Spartan-3A DSP DaVinci Development Kit. The baseline reference design provides the complete FPGA infrastructure to connect to video sources and displays of the Avnet PS Video EXP module mounted onto the Avnet Spartan-3A DSP DaVinci board. To create the FPGA-side of a stand-alone video system, simply augment the baseline reference design with an application-specific co-processor block, in this case the SAD created in experiment 1.

Figure 14 -- Baseline Reference Design 'FPGA Co-Processing Design'

The FPGA-side baseline reference design is located in folder

C:\avnet_s3adsp_dm6437_1_06\bsl\fpga\ise\davinci_coprocessor

4. When the project opens, re-size the ‘sources’ pane in the top-left corner of Project

Navigator, enlarging it such that pathnames of the various components are fully visible.

Figure 15 – Project Navigator

Question #1:

What is the name of the application-specific co-processor in the Project

Navigator ‘sources’ pane ? __________________________________________ In what step of experiment 1 was the application-specific co-processor

generated? __________


(MBD_DM6437_FPGA_en)DaVinci_lab5_speedway_f08_10_1_3_3(13).doc 将本文的Word文档下载到电脑 下载失败或者文档不完整,请联系客服人员解决!

下一篇:浙江省公路桥梁监督质量控制要点

相关阅读
本类排行
× 注册会员免费下载(下载后可以自由复制和排版)

马上注册会员

注:下载文档有可能“只有目录或者内容不全”等情况,请下载之前注意辨别,如果您已付费且无法下载或内容有问题,请联系我们协助你处理。
微信: QQ: