基于FPGA的QPSK系统设计(3)

2019-03-22 12:10

QPSK

end if;

end if;

end process;

----------------信号正弦向量表-------------- process(cnt) begin

casecnt is

when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \

11

QPSK

when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \

12

QPSK

when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \when \

13

QPSK

when \

when \ when \ when others=>dsin<=\end case;

end process;

-------------------双路采样判决------------------------- process(sinclk) begin

ifsinclk'event and sinclk='1' then if pcnt1=126 then

if x1<=\

c<='0'; d<='0';

flag1<='1';

pcnt1<=pcnt1+1;

elsif x1>=\ c<='0'; d<='1';

flag1<='1';

pcnt1<=pcnt1+1;

elsif x1>=\ c<='1'; d<='0'; flag1<='1'; pcnt1<=pcnt1+1; else

c<='1'; d<='1'; flag1<='1';

pcnt1<=pcnt1+1; end if;

else

pcnt1<=pcnt1+1; end if; end if; end process;

-----------------判决后信号的并串转换----------------- process(sinclk)

begin

ifsinclk'event and sinclk='1' and flag1='1' then if pcnt2<64 then y<=d; pcnt2<=pcnt2+1;

14

QPSK

else

y<=c; pcnt2<=pcnt2+1; end if; end if;

end process;

-------------------载波信号延时后产生----------------- process(sinclk1) begin

if sinclk1'event and sinclk1='1' then if flag2='1' then

if pcnt3<190 then pcnt3<=pcnt3+1; elsif pcnt3=190 then

cnt1<=\pcnt3<=pcnt3+1;

else

pcnt3<=200; cnt1<=cnt1+1; end if; flag2<='0';

elsif flag2='0' then if pcnt4<190 then pcnt4<=pcnt4+1; elsif pcnt4=190 then

cnt2<=\pcnt4<=pcnt4+1;

else

pcnt4<=200; cnt2<=cnt2+1; end if; flag2<='1';

end if; end if;

end process;

------------------双路载波信号、同片da芯片产生------------------ process(cnt1,cnt2) begin

if flag2='0' then ab1<='0'; case cnt1 is

when \when \when \

15


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