基于Verilog的mx25L1605A(Serial Flash)模型(6)

2019-03-03 11:19

// dummy_A[ 256*8-i-1 ] = psi_reg[ tmp_int-i-1 ];

// end

// if( dummy_A[ 256*8-i-2 ] == 1'b1 ) begin

// dummy_A[ 256*8-i-2 ] = psi_reg[ tmp_int-i-2 ];

// end

// if( dummy_A[ 256*8-i-3 ] == 1'b1 ) begin

psi_reg[ tmp_int-i-3 ];

1'b1 ) begin

psi_reg[ tmp_int-i-4 ];

1'b1 ) begin

psi_reg[ tmp_int-i-5 ];

1'b1 ) begin

psi_reg[ tmp_int-i-6 ];

1'b1 ) begin

psi_reg[ tmp_int-i-7 ];

{1'b1,1'b0,1'b0,1'b0};

// dummy_A[ 256*8-i-3 ] = // end

// if( dummy_A[ 256*8-i-4 ] == // dummy_A[ 256*8-i-4 ] = // end

// if( dummy_A[ 256*8-i-5 ] == // dummy_A[ 256*8-i-5 ] = // end

// if( dummy_A[ 256*8-i-6 ] == // dummy_A[ 256*8-i-6 ] = // end

// if( dummy_A[ 256*8-i-7 ] == // dummy_A[ 256*8-i-7 ] = // end // end end end end end

if (pmode == 0) begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = end else begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} =

{1'b0,1'b1,1'b0,1'b0};

end end end

pp_p = #90 1'b0;

disable page_program; end

else if (status_reg[0] == 1'b0)begin // count how many bits been shifted if ( dpmode == 1'b0 ) begin // do work on non deep power down mode if ( pmode == 1'b0 ) begin tmp_int = tmp_int + 1; end else begin

{ psi_reg[ 256*8-1:0 ] } = { psi_reg[ 256*8-2:0 ],latch_SO}; tmp_int = tmp_int + 8; end end end

end // end forever end endtask

/*---------------------------------------------------------------*/

/* Description: define a deep power down (DP) */ /*---------------------------------------------------------------*/ task deep_power_down; begin

//$display( $stime, \ if (pmode == 0) begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0}; end else begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0}; end

forever begin

@( posedge CS );

if( CS == 1'b1 ) begin

if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1) if (pmode == 0) begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0}; end else begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0}; end

dpmode <= #tDP 1'b1;

//$display( $stime, \ end

disable deep_power_down; end

end // end forever end endtask

// /*---------------------------------------------------------------*/

// /* Description: define a enter 4kb sector task */ // /*---------------------------------------------------------------*/ // task enter_4kb_sector; // begin

// //$display( $stime, \// forever begin

// @( posedge CS );

// if( CS == 1'b1 ) begin

// if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1) // if (status_reg[0] == 1'b0) begin // WIP (2) // enter4kbmode = 1;

// //$display( $stime, \New Enter 4kb Sector Register = %b\enter4kbmode );

// disable enter_4kb_sector; // end // end // end

// end // end forever // end // endtask //

// /*---------------------------------------------------------------*/

// /* Description: define a exit 4kb sector task */ // /*---------------------------------------------------------------*/ // task exit_4kb_sector; // begin

// //$display( $stime, \// forever begin

// @( posedge CS );

// if( CS == 1'b1 ) begin

// if ( dpmode == 1'b0 ) begin // do work on non deep power down mode (1) // if (status_reg[0] == 1'b0) begin // WIP (2) // enter4kbmode = 0;

// //$display( $stime, \New Enter 4kb Sector Register = %b\

enter4kbmode );

// disable exit_4kb_sector; // end // end // end

// end // end forever // end // endtask //

/*---------------------------------------------------------------*/

/* Description: define a release from deep power dwon task (RDP)*/ /*---------------------------------------------------------------*/ task release_from_deep_power_dwon; begin

//$display( $stime, \ forever begin

@( posedge SCLK or posedge CS ); if( CS == 1'b1 ) begin

dpmode <= #tRES2 1'b0;

//$display( $stime, \ disable release_from_deep_power_dwon; end

else begin

//$display( $stime, \ dummy_cycle( 23 ); read_electronic_id;

//$display( $stime, \ disable release_from_deep_power_dwon; end

end // end forever end endtask

/*---------------------------------------------------------------*/

/* Description: define a read electronic ID (RES) */

/* AB X X X */ /*---------------------------------------------------------------*/ task read_electronic_id;

reg [ 7:0 ] dummy_ID; begin

//$display( $stime, \ if (pmode == 0) begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0}; end

else begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0}; end

dummy_ID = ID_Device; forever begin

@( negedge SCLK or posedge CS ); if( CS == 1'b1 ) begin if (pmode == 0) begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b1,1'b0,1'b0,1'b0}; end else begin

{ENB_S0,ENB_P0,ENB_S1,ENB_P1} = {1'b0,1'b1,1'b0,1'b0}; end

{SO_reg,PO_reg6,PO_reg5,PO_reg4,PO_reg3,PO_reg2,PO_reg1,PO_reg0} <= #tCLQV {1'bz,1'bz,1'bz,1'bz,1'bz,1'bz,1'bz,1'bz}; dpmode <= #tRES2 1'b0;

//$display( $stime, \ disable read_electronic_id; end

else begin

if ( pmode == 1'b0 ) begin

{ SO_reg, dummy_ID } <= #tCLQV { dummy_ID, dummy_ID[ 7 ] };

end

else begin

SO_reg <= #tCLQV ID_Device; end end

end // end forever end endtask

/*-----------------------------------------------------------------*/

/* Description: define a read electronic manufacturer & device ID */ /*-----------------------------------------------------------------*/

task read_electronic_manufacturer_device_id; reg [ 15:0 ] dummy_ID; integer dummy_count; begin

//$width(negedge SCLK,1);

//$period( posedge SCLK, tCY ); // SCLK _/~ -> _/~ if ( si_reg[0]==1'b0 ) begin


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