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DC Electrical Characteristics Over the Operating
(3) 5666 tbl 09
NOTES:
1.At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS".2.f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.3.Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4.VDD = 2.5V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 15mA (Typ).5.CEX = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX CE0X 1XDD - 0.2VCEX DD - 0.2V means CE0X DD - 0.2V or CE1X - 0.2V"X" represents "L" for left port or "R" for right port.
6.ISB1, ISB2 and ISB4 will all reach full standby levels (ISB3) on the appropriate port(s) if ZZL and/or ZZR = VIH.7.166MHz I-Temp is not available in the BF-208 package.
8. 200Mhz is not available in the BF-208 and DR-208 packages.